參數(shù)資料
型號: AD7691
廠商: Analog Devices, Inc.
英文描述: 18-Bit, 1.5 LSB INL, 250 kSPS PulSAR Differential ADC in MSOP/QFN
中文描述: 18位,1.5 LSB INL和250 kSPS的PulSAR系列差分ADC,采用MSOP / QFN封裝
文件頁數(shù): 22/28頁
文件大小: 682K
代理商: AD7691
AD7691
Chain Mode Without Busy Indicator
This mode can be used to daisy-chain multiple AD7691s on
a 3-wire serial interface. This feature is useful for reducing
component count and wiring connections, for example, in
isolated multiconverter applications or for systems with a
limited interfacing capacity. Data readback is analogous to
clocking a shift register.
Rev. 0 | Page 22 of 28
A connection diagram example using two AD7691s is shown in
Figure 42, and the corresponding timing is given in Figure 43.
When SDI and CNV are low, SDO is driven low. With SCK low,
a rising edge on CNV initiates a conversion, selects the chain
mode, and disables the busy indicator. In this mode, CNV is
held high during the conversion phase and the subsequent data
readback. When the conversion is complete, the MSB is output
onto SDO and the AD7691 enters the acquisition phase and
powers down. The remaining data bits stored in the internal
shift register are clocked by subsequent SCK falling edges. For
each ADC, SDI feeds the input of the internal shift register and
is clocked by the SCK falling edge. Each ADC in the chain
outputs its data MSB first, and 18 × N clocks are required to
read back the N ADCs. The data is valid on both SCK edges.
Although the rising edge can be used to capture the data, a
digital host using the SCK falling edge can allow a faster reading
rate and consequently more AD7691s in the chain, provided the
digital host has an acceptable hold time. The maximum
conversion rate can be reduced due to the total readback time.
CLK
CONVERT
DATA IN
DIGITAL HOST
CNV
SCK
SDO
SDI
CNV
SCK
SDO
SDI
AD7691
B
AD7691
A
0
Figure 42. Chain Mode Without Busy Indicator Connection Diagram
SDO
A
= SDI
B
D
A
17
D
A
16
D
A
15
SCK
1
2
3
34
35
36
t
SSDISCK
t
HSDISC
t
EN
CONVERSION
ACQUISITION
t
CONV
t
CYC
t
ACQ
ACQUISITION
CNV
D
A
1
16
17
t
SCK
t
SCKL
t
SCKH
D
A
0
19
20
18
SDI
A
= 0
SDO
B
D
B
17
D
B
16
D
B
15
D
A
1
D
B
1
D
B
0
D
A
17
D
A
16
t
HSDO
t
DSDO
t
SSCKCNV
t
HSCKCNV
D
A
0
0
Figure 43. Chain Mode Without Busy Indicator Serial Interface Timing
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AD7691BRMZ 18-Bit, 1.5 LSB INL, 250 kSPS PulSAR Differential ADC in MSOP/QFN
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