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| 型號： | AD7679ACPZRL |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 18/28頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC ADC 18BIT SAR W/BUFF 48LFCSP |
| 標準包裝： | 2,500 |
| 系列： | PulSAR® |
| 位數(shù)： | 18 |
| 采樣率（每秒）： | 570k |
| 數(shù)據(jù)接口： | 串行，并聯(lián) |
| 轉(zhuǎn)換器數(shù)目： | 1 |
| 功率耗散（最大）： | 103mW |
| 電壓電源： | 模擬和數(shù)字 |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 48-VFQFN 裸露焊盤，CSP |
| 供應商設備封裝： | 48-LFCSP-VQ（7x7） |
| 包裝： | 帶卷 (TR) |
| 輸入數(shù)目和類型： | 1 個差分，雙極 |
| 配用： | EVAL-AD7679CBZ-ND - BOARD EVALUATION FOR AD7679 |
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AD7679
Rev. A | Page 25 of 28
APPLICATION HINTS
LAYOUT
The AD7679 has very good immunity to noise on the power
supplies. However, care should still be taken with regard to
grounding layout.
The printed circuit board that houses the AD7679 should be
designed so that the analog and digital sections are separated
and confined to certain areas of the board. This facilitates the
use of ground planes that can be easily separated. Digital and
analog ground planes should be joined in only one place,
preferably underneath the AD7679, or at least as close to the
AD7679 as possible. If the AD7679 is in a system where
multiple devices require analog-to-digital ground connections,
the connection should still be made at one point only, a star
ground point that should be established as close to the AD7679
as possible.
The user should avoid running digital lines under the device, as
these will couple noise onto the die. The analog ground plane
should be allowed to run under the AD7679 to avoid noise
coupling. Fast switching signals like CNVST or clocks should be
shielded with digital ground to avoid radiating noise to other
sections of the board, and should never run near analog signal
paths. Crossover of digital and analog signals should be
avoided. Traces on different but close layers of the board should
run at right angles to each other. This will reduce the effect of
feedthrough through the board. The power supply lines to the
AD7679 should use as large a trace as possible to provide low
impedance paths and reduce the effect of glitches on the power
supply lines. Good decoupling is also important to lower the
supply’s impedance presented to the AD7679 and to reduce the
magnitude of the supply spikes. Decoupling ceramic capacitors,
typically 100 nF, should be placed close to and ideally right up
against each power supply pin (AVDD, DVDD, and OVDD)
and their corresponding ground pins. Additionally, low ESR
10 μF capacitors should be located near the ADC to further
reduce low frequency ripple.
The DVDD supply of the AD7679 can be a separate supply or
can come from the analog supply, AVDD, or the digital
interface supply, OVDD. When the system digital supply is
noisy or when fast switching digital signals are present, and if
no separate supply is available, the user should connect the
DVDD digital supply to the analog supply AVDD through an
RC filter, (see Figure 25), and connect the system supply to the
interface digital supply OVDD and the remaining digital
circuitry. When DVDD is powered from the system supply, it is
useful to insert a bead to further reduce high frequency spikes.
The AD7679 has four different ground pins: REFGND, AGND,
DGND, and OGND. REFGND senses the reference voltage and
should be a low impedance return to the reference because it
carries pulsed currents. AGND is the ground to which most
internal ADC analog signals are referenced. This ground must
be connected with the least resistance to the analog ground
plane. DGND must be tied to the analog or digital ground plane
depending on the configuration. OGND is connected to the
digital system ground.
The layout of the decoupling of the reference voltage is
important. The decoupling capacitor should be close to the
ADC and should be connected with short and large traces to
minimize parasitic inductances.
EVALUATING THE AD7679’S PERFORMANCE
An evaluation board for the AD7679 allows a quick means
to measure both dc (histograms and time domain) and ac (time
and frequency domain) performances of the converter. The
EVAL-AD7679CBZ is an evaluation board package that
includes a fully assembled and tested evaluation board,
documentation, and software. The accompanying software
requires the use of a capture board, which must be ordered
separately from the evaluation board (see the Ordering Guide
for information). The evaluation board can also be used in a
standalone configuration and does not use the software when
in this mode. Refer to the EVAL-AD76XXEDZ and EVAL-
AD76XXCBZ data sheets available from www.analog.com for
evaluation board details.
Two types of data capture boards can be used with the EVAL-
AD7679CBZ:
USB based (EVAL-CED1Z recommended)
Parallel port based (EVAL-CONTROL BRD3Z not
recommended because many newer PCs do not include
parallel ports any longer)
The recommended board layout for the AD7679 is outlined in
the evaluation board data sheet.
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| AD7679AST | 制造商:Analog Devices 功能描述:ADC Single SAR 570ksps 18-bit Parallel/Serial 48-Pin LQFP 制造商:Analog Devices 功能描述:18BIT SAR ADC SMD 7679 LQFP48 |
| AD7679ASTRL | 制造商:Analog Devices 功能描述:ADC Single SAR 570ksps 18-bit Parallel/Serial 48-Pin LQFP T/R 制造商:Analog Devices 功能描述:ADC SGL SAR 570KSPS 18BIT PARALLEL/SERL 48LQFP - Tape and Reel |
| AD7679ASTZ | 功能描述:IC ADC 18BIT 570KSPS 48-LQFP RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 模數(shù)轉(zhuǎn)換器 系列:PulSAR® 標準包裝:1 系列:microPOWER™ 位數(shù):8 采樣率（每秒）:1M 數(shù)據(jù)接口:串行，SPI? 轉(zhuǎn)換器數(shù)目:1 功率耗散（最大）:- 電壓電源:模擬和數(shù)字 工作溫度:-40°C ~ 125°C 安裝類型:表面貼裝 封裝/外殼:24-VFQFN 裸露焊盤 供應商設備封裝:24-VQFN 裸露焊盤（4x4） 包裝:Digi-Reel® 輸入數(shù)目和類型:8 個單端，單極 產(chǎn)品目錄頁面:892 (CN2011-ZH PDF) 其它名稱:296-25851-6 |
| AD7679ASTZ | 制造商:Analog Devices 功能描述:IC 18-BIT ADC |
| AD7679ASTZRL | 功能描述:IC ADC 18BIT SAR W/BUFF 48LQFP RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 模數(shù)轉(zhuǎn)換器 系列:PulSAR® 標準包裝:1 系列:- 位數(shù):14 采樣率（每秒）:83k 數(shù)據(jù)接口:串行，并聯(lián) 轉(zhuǎn)換器數(shù)目:1 功率耗散（最大）:95mW 電壓電源:雙 ± 工作溫度:0°C ~ 70°C 安裝類型:通孔 封裝/外殼:28-DIP（0.600"，15.24mm） 供應商設備封裝:28-PDIP 包裝:管件 輸入數(shù)目和類型:1 個單端，雙極 |
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