- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄10212 > AD7661ACPZ (Analog Devices Inc)IC ADC 16BIT W/REF 48LFCSP PDF資料下載
參數(shù)資料
| 型號： | AD7661ACPZ |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 18/28頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC ADC 16BIT W/REF 48LFCSP |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 系列： | PulSAR® |
| 位數(shù)： | 16 |
| 采樣率（每秒）： | 100k |
| 數(shù)據(jù)接口： | 串行，并聯(lián) |
| 轉(zhuǎn)換器數(shù)目： | 1 |
| 功率耗散（最大）： | 25mW |
| 電壓電源： | 模擬和數(shù)字 |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 48-VFQFN 裸露焊盤，CSP |
| 供應(yīng)商設(shè)備封裝： | 48-LFCSP-VQ（7x7） |
| 包裝： | 托盤 |
| 輸入數(shù)目和類型： | 2 個偽差分，單極 |
| 配用： | EVAL-AD7661CBZ-ND - BOARD EVALUATION FOR AD7661 |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁當(dāng)前第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁
AD7661
Rev. 0 | Page 25 of 28
External Discontinuous Clock Data Read After
Conversion
Though the maximum throughput cannot be achieved using
this mode, it is the most recommended of the serial slave
modes. Figure 41 shows the detailed timing diagrams of this
method. After a conversion is complete, indicated by BUSY
returning LOW, the conversion’s result can be read while both
CS and RD are LOW. Data is shifted out MSB first with 16 clock
pulses and is valid on the rising and falling edges of the clock.
Among the advantages of this method is the fact that
conversion performance is not degraded because there are no
voltage transients on the digital interface during the conversion
process. Another advantage is the ability to read the data at any
speed up to 40 MHz, which accommodates both the slow digital
host interface and the fastest serial reading.
Finally, in this mode only, the AD7661 provides a daisy-chain
feature using the RDC/SDIN pin for cascading multiple con-
verters together. This feature is useful for reducing component
count and wiring connections when desired, as, for instance, in
isolated multiconverter applications.
An example of the concatenation of two devices is shown in
Figure 43. Simultaneous sampling is possible by using a
common CNVST signal. It should be noted that the RDC/SDIN
input is latched on the opposite edge of SCLK of the one used to
shift out the data on SDOUT. Therefore, the MSB of the
“upstream” converter just follows the LSB of the “downstream”
converter on the next SCLK cycle.
SCLK
SDOUT
RDC/SDIN
BUSY
DATA
OUT
AD7661
#1
(DOWNSTREAM)
BUSY
OUT
SCLK
AD7661
#2
(UPSTREAM)
RDC/SDIN
SDOUT
SCLK IN
CNVST IN
03033-0-036
CNVST
CS
CNVST
CS
CS IN
Figure 43. Two AD7661s in a Daisy-Chain Configuration
External Clock Data Read During Conversion
Figure 42 shows the detailed timing diagrams of this method.
During a conversion, while both CS and RD are LOW, the result
of the previous conversion can be read. The data is shifted out
MSB first with 16 clock pulses, and is valid on both the rising
and falling edges of the clock. The 16 bits must be read before
the current conversion is complete; otherwise, RDERROR is
pulsed HIGH and can be used to interrupt the host interface to
prevent incomplete data reading. There is no daisy-chain feature
in this mode and the RDC/SDIN input should always be tied
either HIGH or LOW.
To reduce performance degradation due to digital activity, a fast
discontinuous clock of at least 18 MHz is recommended to
ensure that all the bits are read during the first half of the
conversion phase. It is also possible to begin to read data after
conversion and continue to read the last bits after a new
conversion has been initiated. This allows the use of a slower
clock speed like 14 MHz.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| SP3077EEN-L/TR | IC TXRX RS485/RS422 ESD 8NSOIC |
| AD7731BRZ-REEL | IC ADC 24BIT SIGMA-DELTA 24-SOIC |
| SP3076EEN-L/TR | IC TXRX RS485/RS422 ESD 14NSOIC |
| AD7667ACPZRL | IC ADC 16BIT UNIPOLAR 48LFCSP |
| SP3075EEN-L/TR | IC TXRX RS485/RS422 ESD 8NSOIC |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AD7661ACPZRL | 功能描述:IC ADC 16BIT W/REF 48-LFCSP RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 模數(shù)轉(zhuǎn)換器 系列:PulSAR® 標(biāo)準(zhǔn)包裝:1,000 系列:- 位數(shù):12 采樣率（每秒）:300k 數(shù)據(jù)接口:并聯(lián) 轉(zhuǎn)換器數(shù)目:1 功率耗散（最大）:75mW 電壓電源:單電源 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:24-SOIC（0.295"，7.50mm 寬） 供應(yīng)商設(shè)備封裝:24-SOIC 包裝:帶卷 (TR) 輸入數(shù)目和類型:1 個單端，單極；1 個單端，雙極 |
| AD7661AST | 制造商:Analog Devices 功能描述:ADC Single SAR 100ksps 16-bit Parallel/Serial 48-Pin LQFP 制造商:Rochester Electronics LLC 功能描述:100KSPS, 16-BIT ADC INT REF, 2.5LSB - Tape and Reel 制造商:Analog Devices 功能描述:16BIT ADC INT REF 7661 LQFP48 |
| AD7661ASTRL | 制造商:Analog Devices 功能描述:ADC Single SAR 100ksps 16-bit Parallel/Serial 48-Pin LQFP T/R 制造商:Analog Devices 功能描述:ADC SGL SAR 100KSPS 16BIT PARALLEL/SERL 48LQFP - Tape and Reel |
| AD7661ASTZ | 功能描述:IC ADC 16BIT W/REF 48-LQFP RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 模數(shù)轉(zhuǎn)換器 系列:PulSAR® 標(biāo)準(zhǔn)包裝:1,000 系列:- 位數(shù):12 采樣率（每秒）:300k 數(shù)據(jù)接口:并聯(lián) 轉(zhuǎn)換器數(shù)目:1 功率耗散（最大）:75mW 電壓電源:單電源 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:24-SOIC（0.295"，7.50mm 寬） 供應(yīng)商設(shè)備封裝:24-SOIC 包裝:帶卷 (TR) 輸入數(shù)目和類型:1 個單端，單極；1 個單端，雙極 |
| AD7661ASTZ | 制造商:Analog Devices 功能描述:16BIT ADC INT REF 7661 LQFP48 |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。