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參數資料
| 型號： | AD7658BSTZ |
| 廠商： | Analog Devices Inc |
| 文件頁數： | 18/32頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC ADC 12BIT 6CH 250KSPS 64LQFP |
| 標準包裝： | 1 |
| 位數： | 12 |
| 采樣率（每秒）： | 250k |
| 數據接口： | 串行，并聯 |
| 轉換器數目： | 6 |
| 功率耗散（最大）： | 143mW |
| 電壓電源： | 模擬和數字，雙 ± |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 64-LQFP |
| 供應商設備封裝： | 64-LQFP（10x10） |
| 包裝： | 托盤 |
| 輸入數目和類型： | 6 個單端，雙極 |
| 產品目錄頁面： | 778 (CN2011-ZH PDF) |
| 配用： | EVAL-AD7658CBZ-ND - BOARD EVAL FOR AD7658 |
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Data Sheet
AD7656/AD7657/AD7658
Rev. D | Page 25 of 32
Changing the Analog Input Range (H/S SEL = 0)
The AD7656/AD7657/AD7658 RANGE pin allows the user to
select either ±2 × VREF or ±4 × VREF as the analog input range for
the six analog inputs. When the H/S SEL pin is low, the logic
state of the RANGE pin is sampled on the falling edge of the
BUSY signal to determine the range for the next simultaneous
conversion. When the RANGE pin is logic high at the falling
edge of the BUSY signal, the range for the next conversion is
±2 × VREF. When the RANGE pin is logic low at the falling
edge of the BUSY signal, the range for the next conversion is
±4 × VREF. After a RESET pulse, the range is updated on the first
falling BUSY edge after the RESET pulse.
Changing the Analog Input Range (H/S SEL = 1)
When the H/S SEL pin is high, the range can be changed by
writing to the control register. DB[12:10] in the control register
are used to select the analog input ranges for the next conversion.
Each analog input pair has an associated range bit, allowing
independent ranges to be programmed on each ADC pair.
When the RNGx bit = 1, the range for the next conversion
is ±2 × VREF. When the RNGx bit = 0, the range for the next
conversion is ±4 × VREF.
Serial Interface (SER/PAR = 1)
By pulsing one, two, or all three CONVST x signals, the
AD7656/AD7657/AD7658 use their on-chip trimmed oscillator
to simultaneously convert the selected channel pairs on the
rising edge of CONVST x. After the rising edge of CONVST x,
the BUSY signal goes high to indicate that the conversion has
started. It returns low when the conversion is complete 3 s
later. The output register is loaded with the new conversion
results, and data can be read from the AD7656/AD7657/AD7658.
To read the data back from the parts over the serial interface,
SER/PAR should be tied high. The CS and SCLK signals are
used to transfer data from the AD7656/AD7657/AD7658. The
parts have three DOUT pins, DOUT A, DOUT B, and DOUT C.
Data can be read back from each part using one, two, or all
three DOUT lines.
Figure 30 shows six simultaneous conversions and the read
sequence using three DOUT lines. Also in Figure 30, 32 SCLK
transfers are used to access data from the AD7656/AD7657/
AD7658; however, two 16 SCLK individually framed transfers
with the CS signal can also be used to access the data on the
three DOUT lines. When operating the AD7656/AD7657/AD7658
in serial mode with conversion data clocking out on all three
DOUT lines, DB0/SEL A, DB1/SEL B, and DB2/SEL C should be
tied to VDRIVE. These pins are used to enable the DOUT A to
DOUT C lines, respectively.
If it is required to clock conversion data out on two data out
lines, DOUT A and DOUT B should be used. To enable DOUT A
and DOUT B, DB0/SEL A and DB1/SEL B should be tied to
VDRIVE and DB2/SEL C should be tied low. When six simultaneous
conversions are performed and only two DOUT lines are used,
a 48 SCLK transfer can be used to access the data from the
AD7656/AD7657/AD7658. The read sequence is shown in
Figure 31 for a simultaneous conversion on all six ADCs using
two DOUT lines. If a simultaneous conversion occurred on all
six ADCs, and only two DOUT lines are used to read the results
from the AD7656/AD7657/AD7658. DOUT A clocks out the
result from V1, V2, and V5, while DOUT B clocks out the
results from V3, V4, and V6.
Data can also be clocked out using just one DOUT line, in
which case, DOUT A should be used to access the conversion
data. To configure the AD7656/AD7657/AD7658 to operate in
this mode, DB0/SEL A should be tied to VDRIVE and DB1/SEL B
and DB2/SEL C should be tied low. The disadvantage of using
just one DOUT line is that the throughput rate is reduced. Data
can be accessed from the AD7656/AD7657/AD7658 using one
96 SCLK transfer, three 32 SCLK individually framed transfers,
or six 16 SCLK individually framed transfers. In serial mode,
the RD signal should be tied low. The unused DOUT line(s)
should be left unconnected in serial mode.
Serial Read Operation
Figure 32 shows the timing diagram for reading data from the
AD7656/AD7657/AD7658 in serial mode. The SCLK input signal
provides the clock source for the serial interface. The CS signal
goes low to access data from the AD7656/AD7657/AD7658.
The falling edge of CS takes the bus out of three-state and
clocks out the MSB of the 16-bit conversion result. The ADCs
output 16 bits for each conversion result; the data stream of the
AD7656 consists of 16 bits of conversion data provided MSB
first. The data stream for the AD7657 consists of two leading
zeros followed by 14 bits of conversion data MSB first. The data
stream for the AD7658 consists of four leading zeros and 12 bits
of conversion data provided MSB first.
The first bit of the conversion result is valid on the first SCLK
falling edge after the CS falling edge. The subsequent 15 data
bits are clocked out on the rising edge of the SCLK signal. Data
is valid on the SCLK falling edge. To access each conversion
result, 16 clock pulses must be provided to the AD7656/AD7657/
AD7658. Figure 32 shows how a 16 SCLK read is used to access
the conversion results.
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相關代理商/技術參數 |
參數描述 |
|---|---|
| AD7658BSTZ-1 | 功能描述:IC ADC 12BIT 6CH 250KSPS 64LQFP RoHS:是 類別:集成電路 (IC) >> 數據采集 - 模數轉換器 系列:- 其它有關文件:TSA1204 View All Specifications 標準包裝:1 系列:- 位數:12 采樣率（每秒）:20M 數據接口:并聯 轉換器數目:2 功率耗散（最大）:155mW 電壓電源:模擬和數字 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:48-TQFP 供應商設備封裝:48-TQFP（7x7） 包裝:Digi-Reel® 輸入數目和類型:4 個單端，單極；2 個差分，單極 產品目錄頁面:1156 (CN2011-ZH PDF) 其它名稱:497-5435-6 |
| AD7658BSTZ-1-RL | 功能描述:IC ADC 12BIT 6CH 250KSPS 64LQFP RoHS:是 類別:集成電路 (IC) >> 數據采集 - 模數轉換器 系列:- 標準包裝:1,000 系列:- 位數:12 采樣率（每秒）:300k 數據接口:并聯 轉換器數目:1 功率耗散（最大）:75mW 電壓電源:單電源 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:24-SOIC（0.295"，7.50mm 寬） 供應商設備封裝:24-SOIC 包裝:帶卷 (TR) 輸入數目和類型:1 個單端，單極；1 個單端，雙極 |
| AD7658BSTZ-REEL | 功能描述:IC ADC 12BIT 6CH 250KSPS 64-LQFP RoHS:是 類別:集成電路 (IC) >> 數據采集 - 模數轉換器 系列:- 標準包裝:1,000 系列:- 位數:12 采樣率（每秒）:300k 數據接口:并聯 轉換器數目:1 功率耗散（最大）:75mW 電壓電源:單電源 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:24-SOIC（0.295"，7.50mm 寬） 供應商設備封裝:24-SOIC 包裝:帶卷 (TR) 輸入數目和類型:1 個單端，單極；1 個單端，雙極 |
| AD7658BSTZ-U3 | 制造商:Analog Devices 功能描述:ADC HEX SAR 250KSPS 12-BIT PARALLEL/SERL 64LQFP - Rail/Tube |
| AD7658YSTZ | 功能描述:IC ADC 12BIT 6CH 250KSPS 64-LQFP RoHS:是 類別:集成電路 (IC) >> 數據采集 - 模數轉換器 系列:- 其它有關文件:TSA1204 View All Specifications 標準包裝:1 系列:- 位數:12 采樣率（每秒）:20M 數據接口:并聯 轉換器數目:2 功率耗散（最大）:155mW 電壓電源:模擬和數字 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:48-TQFP 供應商設備封裝:48-TQFP（7x7） 包裝:Digi-Reel® 輸入數目和類型:4 個單端，單極；2 個差分，單極 產品目錄頁面:1156 (CN2011-ZH PDF) 其它名稱:497-5435-6 |
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