![](http://datasheet.mmic.net.cn/Analog-Devices-Inc/AD760AQ_datasheet_95890/AD760AQ_12.png)
–12–
AD760
REV. A
One feature that the AD760 incorporates to help the user layout
is that the analog pins (VCC, VEE, REF OUT, REF IN, SPAN/
BIP OFFSET, VOUT, MUXOUT, MUXIN and AGND) are adja-
cent to help isolate analog signals from digital signals.
SUPPLY DECOUPLING
The AD760 power supplies should be well filtered, well regu-
lated, and free from high frequency noise. Switching power sup-
plies are not recommended due to their tendency to generate
spikes which can induce noise in the analog system.
Decoupling capacitors should be used in very close layout prox-
imity between all power supply pins and ground. A 10 F tantalum
capacitor in parallel with a 0.1 F ceramic capacitor provides ad-
equate decoupling. VCC and VEE should be bypassed to analog
ground, while VLL should be decoupled to digital ground.
An effort should be made to minimize the trace length between
the capacitor leads and the respective converter power supply
and common pins. The circuit layout should attempt to locate
the AD760, associated analog circuitry and interconnections as
far as possible from logic circuitry. A solid analog ground plane
around the AD760 will isolate large switching ground currents.
For these reasons, the use of wire wrap circuit construction is not
recommended; careful printed circuit construction is preferred.
GROUNDING
The AD760 has two pins, designated analog ground (AGND)
and digital ground (DGND.) The analog ground pin is the
“high quality” ground reference point for the device. Any exter-
nal loads on the output of the AD760 should be returned to
analog ground. If an external reference is used, this should also
be returned to the analog ground.
If a single AD760 is used with separate analog and digital
ground planes, connect the analog ground plane to AGND and
the digital ground plane to DGND keeping lead lengths as short
as possible. Then connect AGND and DGND together at the
AD760. If multiple AD760s are used or the AD760 shares ana-
log supplies with other components, connect the analog and
digital returns together once at the power supplies rather than at
each chip. This single interconnection of grounds prevents large
ground loops and consequently prevents digital currents from
flowing through the analog ground.
PRINTED
IN
U.S.A.
C2023–18–4/95
PACKAGE INFORMATION
28-Pin Cerdip Package (Q-28)
1.490 (37.84) MAX
28
1
15
14
GLASS SEALANT
0.18 (4.57)
MAX
0.620 (15.74)
0.590 (14.93)
15
°
0
°
0.012 (0.305)
0.008 (0.203)
0.125 (3.175)
MIN
0.02 (0.5)
0.016 (0.406)
0.06 (1.52)
0.05 (1.27)
0.11 (2.79)
0.099 (2.28)
0.22
(5.59)
MAX
0.525 (13.33)
0.515 (13.08)