參數(shù)資料
型號: AD7568BP
廠商: Analog Devices Inc
文件頁數(shù): 4/14頁
文件大小: 0K
描述: IC DAC 12BIT LC2MOS OCTAL 44PLCC
產(chǎn)品培訓(xùn)模塊: Data Converter Fundamentals
DAC Architectures
標準包裝: 1
設(shè)置時間: 500ns
位數(shù): 12
數(shù)據(jù)接口: 串行
轉(zhuǎn)換器數(shù)目: 8
電壓電源: 單電源
功率耗散(最大): 17.5mW
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 44-LCC(J 形引線)
供應(yīng)商設(shè)備封裝: 44-PLCC(16.59x16.59)
包裝: 管件
輸出數(shù)目和類型: 16 電流,單極;16 電流,雙極
采樣率(每秒): 2M
AD7568
–12–
For systems which contain larger numbers of AD7568s and
where the user also wishes to read back the DAC contents for
diagnostic purposes, the SDOUT pin may be used to daisy
chain several devices together and provide the necessary serial
readback. An example with the 68HC11 is shown in Figure 25.
The routine below shows how four AD7568s would be pro-
grammed in such a system. Data is transmitted at the MOSI pin
of the 68HC11. It flows through the input shift registers of the
AD7568s and finally appears at the SDOUT pin of DAC N. So,
the readback routine can be invoked any time after the first four
words have been transmitted (the four input shift registers in the
chain will now be filled up and further activity on the CLKIN
pin will result in data being read back to the microcomputer
through the MISO pin). System connectivity can be verified in
this manner. For a four-device system (32 DACs) a two-line to
four-line decoder is necessary.
Note that to program the 32 DACs, 35 transmit operations are
needed. In the routine, three words must be retransmitted. The
first word for DACs #3, #2 and #1 must be transmitted twice in
order to synchronize their arrival at the SDIN pin with A0 going
low.
Table V. Routine for Loading 4 AD7568s Connected As in
Figure 25
Bring PC7 (FSIN) low to allow writing to the AD7568s.
Enable AD7568 #4 (Bring A0 low). Disable the others.
Transmit 1st 16-bit word: Data for DAC H, #4
. . . .
Transmit 9th 16-bit word: Data for DAC H, #3
Transmit 9th 16-bit word again: Data for DAC H, #3
Transmit 10th 16-bit word: Data for DAC G, #3
Transmit 11th 16-bit word: Data for DAC F, #3
Enable AD7568 #3, Disable the others.
Transmit 12th 16-bit word: Data for DAC E, #3
. . . .
Transmit 17th 16-bit word: Data for DAC H, #2
Transmit 17th 16-bit word again: Data for DAC H, #2
Transmit 18th 16-bit word: Data for DAC G, #2
Enable AD7568 #2, Disable the others.
Transmit 19th 16-bit word: Data for DAC F, #2
. . . .
Transmit 25th word: Data for DAC H, #1
Enable AD7568 #1, Disable the others.
Transmit 25th word again: Data for DAC H, #1
Transmit 26th word: Data for DAC G, #1
. . . .
Transmit 32nd word: Data for DAC A, #1
Bring PC7 (FSIN) high to disable writing to the AD7568s.
PC7
SCK
PC6
MISO
SCLK
SDIN
LDAC
FSIN
68HC11*
AD7568*
(DAC 1)
*ADDITIONAL PINS OMITTED FOR CLARITY
A0
SCLK
LDAC
FSIN
AD7568*
(DAC 2)
A0
DECODE LOGIC
SDIN
MOSI
SDOUT
SCLK
LDAC
FSIN
AD7568*
(DAC N)
A0
SDIN
SDOUT
Figure 25. Multi-DAC System
REV. C
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