參數(shù)資料
型號: AD7533CQ
廠商: Analog Devices Inc
文件頁數(shù): 11/12頁
文件大?。?/td> 0K
描述: IC DAC 10BIT MULTIPLYING 16-CDIP
產(chǎn)品培訓(xùn)模塊: Data Converter Fundamentals
DAC Architectures
標(biāo)準(zhǔn)包裝: 25
設(shè)置時間: 600ns
位數(shù): 10
數(shù)據(jù)接口: 并聯(lián)
轉(zhuǎn)換器數(shù)目: 1
電壓電源: 單電源
功率耗散(最大): 30mW
工作溫度: -40°C ~ 85°C
安裝類型: 通孔
封裝/外殼: 16-CDIP(0.300",7.62mm)
供應(yīng)商設(shè)備封裝: 16-CDIP
包裝: 管件
輸出數(shù)目和類型: 2 電流,單極;2 電流,雙極
采樣率(每秒): 1.7M
AD7533
Rev. C | Page 8 of 12
OPERATION
UNIPOLAR BINARY CODE
Table 4. Unipolar Binary Operation
(2-Quadrant Multiplication)
Digital Input
Analog Output
MSB
LSB
(VOUT as shown in Figure 11)
1 1 1 1 1 1 1 1 1 1
1024
1023
REF
V
1 0 0 0 0 0 0 0 0 1
1024
513
REF
V
1 0 0 0 0 0 0 0 0 0
=
2
1024
512
REF
V
0 1 1 1 1 1 1 1 1 1
1024
511
REF
V
0 0 0 0 0 0 0 0 0 1
1024
1
REF
V
0 0 0 0 0 0 0 0 0 0
0
1024
0
=
REF
V
Nominal LSB magnitude for the circuit of Figure 11 is given by
=
1024
1
REF
V
LSB
3
14
1
16
2
15
4
13
AD7533
UNIPOLAR
DIGITAL
INPUT
MSB
VDD
VREF
IOUT1
VOUT
IOUT2
RFB
C1
GND
BIPOLAR
ANALOG INPUT
±10V
R1
1k
R2
330
LSB
NOTES
1. R1 AND R2 USED ONLY IF GAIN ADJUSTMENT IS REQUIRED.
2. C1 PHASE COMPENSATION (5pF TO 15pF) MAY BE REQUIRED
WHEN USING HIGH SPEED AMPLIFIER.
01
134
-01
0
Figure 11. Unipolar Binary Operation (2-Quadrant Multiplication)
BIPOLAR (OFFSET BINARY) CODE
Table 5. Unipolar Binary Operation
(4-Quadrant Multiplication)
Digital Input
Analog Output
MSB
LSB
(VOUT as shown in Figure 12)
1 1 1 1 1 1 1 1 1 1
+
512
511
REF
V
1 0 0 0 0 0 0 0 0 1
+
512
1
REF
V
1 0 0 0 0 0 0 0 0 0
0
0 1 1 1 1 1 1 1 1 1
512
1
REF
V
0 0 0 0 0 0 0 0 0 1
512
511
REF
V
0 0 0 0 0 0 0 0 0 0
512
REF
V
Nominal LSB magnitude for the circuit of Figure 12 is given by
=
512
1
REF
V
LSB
3
14
1
16
2
15
4
13
AD7533
BIPOLAR
DIGITAL
INPUT
MSB
VDD
VREF
IOUT1
VOUT
IOUT2
C1
GND
A1
A2
±10V
BIPOLAR
ANALOG INPUT
R1
1k
R2
330
R3
10k
R6
5k
R4
20k
LSB
NOTES
1. R3, R4, AND R5 SELECTED FOR MATCHING AND TRACKING.
2. R1 AND R2 USED ONLY IF GAIN ADJUSTMENT IS REQUIRED.
3. C1 PHASE COMPENSATION (5pF TO 15pF) MAY BE REQUIRED
WHEN USING HIGH SPEED AMPLIFIERS.
01
13
4-
0
11
R5
20k
Figure 12. Bipolar Operation (4-Quadrant Multiplication)
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