(TA = +25°C, unless otherwise noted)" />
參數(shù)資料
型號(hào): AD7524JRZ
廠商: Analog Devices Inc
文件頁(yè)數(shù): 3/8頁(yè)
文件大小: 0K
描述: IC DAC 8BIT MULTIPLYING 16-SOIC
產(chǎn)品培訓(xùn)模塊: Data Converter Fundamentals
DAC Architectures
標(biāo)準(zhǔn)包裝: 48
設(shè)置時(shí)間: 250ns
位數(shù): 8
數(shù)據(jù)接口: 并聯(lián)
轉(zhuǎn)換器數(shù)目: 1
電壓電源: 單電源
功率耗散(最大): 30mW
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 16-SOIC(0.154",3.90mm 寬)
供應(yīng)商設(shè)備封裝: 16-SOIC
包裝: 管件
輸出數(shù)目和類型: 2 電流,單極;2 電流,雙極
采樣率(每秒): 4M
產(chǎn)品目錄頁(yè)面: 784 (CN2011-ZH PDF)
AD7524
REV. B
–3–
ABSOLUTE MAXIMUM RATINGS*
(TA = +25°C, unless otherwise noted)
VDD to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V, +17 V
VRFB to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
±25 V
VREF to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
±25 V
Digital Input Voltage to GND . . . . . . . . –0.3 V to VDD +0.3 V
OUT1, OUT2 to GND . . . . . . . . . . . . . –0.3 V to VDD +0.3 V
Power Dissipation (Any Package)
To +75
°C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 450 mW
Derates above 75
°C by . . . . . . . . . . . . . . . . . . . . 6 mW/°C
Operating Temperature
Commercial (J, K, L) . . . . . . . . . . . . . . . . . –40
°C to +85°C
Industrial (A, B, C) . . . . . . . . . . . . . . . . . . –40
°C to +85°C
Extended (S, T, U) . . . . . . . . . . . . . . . . . –55
°C to +125°C
Storage Temperature . . . . . . . . . . . . . . . . . . –65
°C to +150°C
Lead Temperature (Soldering, 10 secs) . . . . . . . . . . . +300
°C
*Stresses above those listed under “Absolute Maximum Ratings” may cause
permanent damage to the device. This is a stress rating only and functional
operation of the device at these or any other conditions above those indicated in the
operational sections of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect device reliability.
WARNING!
ESD SENSITIVE DEVICE
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection.
Although the AD7524 features proprietary ESD protection circuitry, permanent damage may
occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD
precautions are recommended to avoid performance degradation or loss of functionality.
TERMINOLOGY
RELATIVE ACCURACY: A measure of the deviation from a
straight line through the end points of the DAC transfer function.
Normally expressed as a percentage of full scale range. For the
AD7524 DAC, this holds true over the entire VREF range.
RESOLUTION: Value of the LSB. For example, a unipolar con-
verter with n bits has a resolution of (2
–n) (V
REF). A bipolar con-
verter of n bits has a resolution of [2
–(n–1)] [V
REF]. Resolution in no
way implies linearity.
GAIN ERROR: Gain Error is a measure of the output error be-
tween an ideal DAC and the actual device output. It is measured
with all 1s in the DAC after offset error has been adjusted out
and is expressed in LSBs. Gain Error is adjustable to zero with
an external potentiometer.
FEEDTHROUGH ERROR: Error caused by capacitive cou-
pling from VREF to output with all switches OFF.
OUTPUT CAPACITANCE: Capacity from OUT1 and
OUT2 terminals to ground.
OUTPUT LEAKAGE CURRENT: Current which appears
on OUT1 terminal with all digital inputs LOW or on OUT2
terminal when all inputs are HIGH. This is an error current
which contributes an offset voltage at the amplifier output.
PIN CONFIGURATIONS
DIP, SOIC
PLCC
LCCC
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