參數(shù)資料
型號(hào): AD7472BRU
廠商: Analog Devices Inc
文件頁(yè)數(shù): 7/21頁(yè)
文件大?。?/td> 0K
描述: IC ADC 12BIT PARALLEL 24-TSSOP
標(biāo)準(zhǔn)包裝: 1
位數(shù): 12
采樣率(每秒): 1.5M
數(shù)據(jù)接口: 并聯(lián)
轉(zhuǎn)換器數(shù)目: 1
功率耗散(最大): 12mW
電壓電源: 模擬和數(shù)字
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 24-TSSOP(0.173",4.40mm 寬)
供應(yīng)商設(shè)備封裝: 24-TSSOP
包裝: 管件
輸入數(shù)目和類型: 1 個(gè)單端,單極
REV. B
AD7470/AD7472
–14–
Mode 1
Figure 14 shows the AD7472 conversion sequence in Mode 1
using a throughput rate of 500 kSPS and a clock frequency of
26 MHz. At 5 V supply, the current consumption for the part
when converting is typically 2 mA, and the quiescent current is
typically 650
A. The conversion time of 531.66 ns contributes
2.658 mW to the overall power dissipation in the following way:
(531.66 ns/2
s) × (5 × 2 mA) = 2.658 mW
The contribution to the total power dissipated by the remaining
1.468
s of the cycle is 2.38 mW.
(1.468
s/2 s) × (5 × 650 A) = 2.38 mW
Thus the power dissipated during each cycle is
2.658 mW + 2.38 mW = 5.038 mW
CONVST
BUSY
531.66ns
1.468 s
2 s
tCONVERT
tQUIESCENT
Figure 14. Mode 1 Power Dissipation
Mode 2
Figure 15 shows the AD7472 conversion sequence in Mode 2
using a throughput rate of 500 kSPS and a clock frequency of
26 MHz. At 5 V supply, the current consumption for the part
when converting is typically 2 mA, while the sleep current is 1
A
max. The power dissipated during this power-down is negli-
gible, and is thus not worth considering in the total power fig-
ure. During the wake-up phase, the AD7472 will draw 650
A
typically. Overall power dissipated is
531 66
2
5
2
1
2
5
650
4 283
./
/
.
ns
s
mA
s
A
mW
() ××
() + () ××
() =
CONVST
BUSY
tWAKEUP
531.66ns
1.468 s
2 s
1 s
tCONVERT
tQUIESCENT
Figure 15. Mode 2 Power Dissipation
TPC 1 sand TPC 2 show a typical graphical representation of
Power vs. Throughput for the AD7472 when in (a) Mode 1
@ 5 V and 3 V and Mode 2 @ 5 V and 3 V
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