TSETTLE
參數(shù)資料
型號: AD746JR
廠商: Analog Devices Inc
文件頁數(shù): 7/8頁
文件大小: 0K
描述: IC OPAMP BIFET 13MHZ DUAL 8SOIC
標準包裝: 98
放大器類型: J-FET
電路數(shù): 2
轉(zhuǎn)換速率: 75 V/µs
增益帶寬積: 13MHz
-3db帶寬: 13MHz
電流 - 輸入偏壓: 110pA
電壓 - 輸入偏移: 300µV
電流 - 電源: 7mA
電流 - 輸出 / 通道: 25mA
電壓 - 電源,單路/雙路(±): 9 V ~ 36 V,±4.5 V ~ 18 V
工作溫度: 0°C ~ 70°C
安裝類型: 表面貼裝
封裝/外殼: 8-SOIC(0.154",3.90mm 寬)
供應商設備封裝: 8-SO
包裝: 管件
AD746
REV. B
–7–
Table I. Performance Summary for the 3 Op Amp
Instrumentation Amplifier Circuit
TSETTLE
Gain
RG
Bandwidth
(0.01%)
2
20 k
2.5 MHz
1.0
s
10
4.04 k
1 MHz
2.0
s
100
404
290 kHz
5.0
s
Figure 25. Settling Time of the 3 Op
Amp Instrumentation Amplifier.
Gain = 10, Horizontal Scale: 0.5
s/Div,
Vertical Scale: 5 V/Div.
Error Signal Scale: 0.01%/Div.
THD Performance Considerations
The AD746 was carefully optimized to offer excellent
performance in terms of total harmonic distortion (THD) in
signal processing applications. The THD level when operating
the AD746 in inverting gain applications will show a gradual
rise from the distortion floor of 20 dB/decade (see Figure 28).
In noninverting applications, care should be taken to balance
the source impedances at both the inverting and noninverting
inputs, to avoid distortion caused by the modulation of input
capacitance inherent in all BiFET op amps.
Figure 26. THD Measurement, Inverter Circuit
Figure 27. THD Measurement, Follower Circuit
A HIGH SPEED 3 OR AMP INSTRUMENTATION
AMPLIFIER CIRCUIT
The instrumentation amplifier circuit shown in Figure 23 can
provide a range of gains from 2 up to 1000 and higher. The
circuit bandwidth is 2.5 MHz at a gain of 2 and 750 kHz at a
gain of 10; settling time for the entire circuit is less than 2
s to
within 0.01% for a 10 volt step, (G = 10).
Figure 23. A High Performance, 3 Op Amp, Instrumenta-
tion Amplifier Circuit
Figure 24. Pulse Response of the 3
Op Amp Instrumentation Amplifier.
Gain = 10, Horizontal Scale:
0.5
s/Div, Vertical Scale: 5 V/Div.
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