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| 型號： | AD7274BRMZ-REEL |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 9/29頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC ADC 12BIT 3MSPS HS LP 8MSOP |
| 標準包裝： | 3,000 |
| 位數(shù)： | 12 |
| 采樣率（每秒）： | 3M |
| 數(shù)據(jù)接口： | DSP，MICROWIRE?，QSPI?，串行，SPI? |
| 轉(zhuǎn)換器數(shù)目： | 1 |
| 功率耗散（最大）： | 18mW |
| 電壓電源： | 單電源 |
| 工作溫度： | -40°C ~ 125°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 8-TSSOP，8-MSOP（0.118"，3.00mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 8-MSOP |
| 包裝： | 帶卷 (TR) |
| 輸入數(shù)目和類型： | 1 個單端，單極 |
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AD7273/AD7274
Rev. 0 | Page 16 of 28
TYPICAL CONNECTION DIAGRAM
Figure 27 shows a typical connection diagram for the AD7273/
AD7274. An external reference must be applied to the ADC.
This reference can be in the range of 1.4 V to VDD. A precision
reference, such as the REF19x family or the ADR421, can be
used to supply the reference voltage to the AD7273/AD7274.
The conversion result is output in a 16-bit word with two leading
zeros followed by the 12-bit or 10-bit result. The 12-bit result from
the AD7274 is followed by two trailing zeros, and the 10-bit result
from the AD7273 is followed by four trailing zeros.
Table 7 provides some typical performance data with various
references under the same setup conditions for the AD7274.
Table 7. AD7274 Performance (Various Voltage Reference IC)
Voltage Reference
AD7274 SNR Performance
1 MHz Input
AD780 @ 2.5 V
71.3 dB
AD780 @ 3 V
70.1 dB
REF195
70.9 dB
AD7273/
AD7274
VDD
VIN
SERIAL
INTERFACE
0V TO VREF
INPUT
DSP/
μC/μP
VREF
AGND/DGND
SCLK
CS
SDATA
0.1
μF
10
μF
10pF
0.1
μF
2.5V
3.6V
SUPPLY
4.6 mA
REF195
04973-027
Figure 27. AD7273/AD7274 Typical Connection Diagram
ANALOG INPUT
Figure 28 shows an equivalent circuit of the analog input
structure of the AD7273/AD7274. The two diodes, D1 and D2,
provide ESD protection for the analog inputs. Care must be
taken to ensure that the analog input signal never exceeds the
supply rails by more than 300 mV. Signals exceeding this value
cause these diodes to become forward biased and to start
conducting current into the substrate. These diodes can
conduct a maximum current of 10 mA without causing
irreversible damage to the part. Capacitor C1 in Figure 28 is
typically about 4 pF and can primarily be attributed to pin
capacitance. Resistor R1 is a lumped component made up of the
on resistance of a switch. This resistor is typically about 75 Ω.
Capacitor C2 is the ADC sampling capacitor and has a capacitance
of 32 pF typically. For ac applications, removing high frequency
components from the analog input signal is recommended by
using a band-pass filter on the relevant analog input pin. In
applications where harmonic distortion and signal-to-noise
ratio are critical, the analog input should be driven from a low
impedance source. Large source impedances significantly affect
the ac performance of the ADCs. This may necessitate the use
of an input buffer amplifier. The AD8021 op amp is compatible
with this device; however, the choice of the op amp is a function
of the particular application.
C1
4pF
C2
R1
CONVERSION PHASE–SWITCH OPEN
TRACK PHASE–SWITCH CLOSED
D1
D2
VDD
VIN
04973-028
Figure 28. Equivalent Analog Input Circuit
When no amplifier is used to drive the analog input, the source
impedance should be limited to a low value. The maximum source
impedance depends on the amount of THD that can be tolerated.
The THD increases as the source impedance increases and perfor-
mance degrades. Figure 14 shows a graph of the THD vs. the
analog input frequency for different source impedances when
using a supply voltage of 3 V and sampling at a rate of 3 MSPS.
DIGITAL INPUTS
The digital inputs applied to the AD7273/AD7274 are not
limited by the maximum ratings that limit the analog inputs.
Instead, the digital inputs can be applied at up to 6 V and are
not restricted by the VDD + 0.3 V limit of the analog inputs. For
example, if the AD7273/AD7274 were operated with a VDD of
3 V, then 5 V logic levels could be used on the digital inputs.
However, it is important to note that the data output on SDATA
still has 3 V logic levels when VDD = 3 V. Another advantage of
SCLK and CS not being restricted by the VDD + 0.3 V limit is
that power supply sequencing issues are avoided. For example,
unlike with the analog inputs, with the digital inputs, if CS or
SCLK are applied before VDD, there is no risk of latch-up.
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| AD7274BUJZ-500RL7 | 功能描述:IC ADC 12BIT 3MSPS TSOT23-8 RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 模數(shù)轉(zhuǎn)換器 系列:- 標準包裝:1 系列:microPOWER™ 位數(shù):8 采樣率（每秒）:1M 數(shù)據(jù)接口:串行，SPI? 轉(zhuǎn)換器數(shù)目:1 功率耗散（最大）:- 電壓電源:模擬和數(shù)字 工作溫度:-40°C ~ 125°C 安裝類型:表面貼裝 封裝/外殼:24-VFQFN 裸露焊盤 供應(yīng)商設(shè)備封裝:24-VQFN 裸露焊盤（4x4） 包裝:Digi-Reel® 輸入數(shù)目和類型:8 個單端，單極 產(chǎn)品目錄頁面:892 (CN2011-ZH PDF) 其它名稱:296-25851-6 |
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