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參數(shù)資料
| 型號(hào)： | AD7228A |
| 廠商： | Analog Devices, Inc. |
| 英文描述： | Octal 8-Bit DAC(八通道LC2MOS 8位D/A轉(zhuǎn)換器) |
| 中文描述： | 八進(jìn)制8位DAC（八通道LC2MOS 8位的D / A轉(zhuǎn)換器） |
| 文件頁數(shù)： | 7/8頁 |
| 文件大?。?/td> | 217K |
| 代理商： | AD7228A |
AD7228A
REV. A
–7–
DACs for correct timing relationships during the calibration
cycle of the instrument.
Figure 10b. AD7228A Timing Deskew Circuit
COARSE /FINE ADJUST
T he DACs on the AD7228A can be paired together to form a
coarse/fine adjust function as indicated in Figure 11. T he func-
tion is achieved using one external op amp and a few resistors
per pair of DACs.
DAC1 is the most significant or coarse DAC. Data is first
loaded to this DAC to coarsely set the output voltage. DAC2 is
then used to fine tune this output voltage. Varying the ratio of
R1 to R2 varies the relative effect of the coarse and fine DACs
on the output voltage. For the resistor values shown, DAC2 has
a resolution of 150
μ
V in a 10 V output range. Since each DAC
on the AD7228A is guaranteed monotonic, the coarse adjust-
ment and fine adjustment are each monotonic. One application
for this is as a set-point controller (see “Circuit Applications of
the AD7226 Quad CMOS DAC” available from Analog Devices,
Publication Number E873–15–11/84).
Figure 11. Coarse/Fine Adjust Circuit
SE LF-PROGRAMMABLE RE FE RE NCE
T he circuit of Figure 12 shows how one DAC of the AD7228,
in this case DAC1, may be used in a feedback configuration to
provide a programmable reference for itself and the other seven
converters. T he relationship of V
REF
to V
IN
is expressed by
(
1
+
G
·
D
1
V
REF
=
1
+
G
)
(
)
·
V
IN
where
G
= R2/R1
Figure 13 shows typical plots of V
REF
versus digital code, D
1
, for
three different values of G. With V
IN
= 2.5 V and G = 3 the
voltage at the output varies between 2.5 V and 10 V giving an
effective 10-bit dynamic range to the other seven converters. For
correct operation of the circuit, V
SS
should be –5 V and R1
greater than 6.8 k
.
Figure 12. Self-Programmable Reference
Figure 13. Variation of V
REF
with Feedback Configuration
MICROPROCE SSOR INT E RFACING
Figure 14. AD7228A to 8085A/Z80 Interface
Figure 15. AD7228A to 6809/6502 Interface
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