參數(shù)資料
型號： AD7195BCPZ
廠商： Analog Devices Inc
文件頁數(shù)： 37/45頁
文件大?。?/td> 0K
描述： IC AFE 24BIT 4.8K 32LFSP
設計資源： Precision Weigh Scale Design Using AD7195 with Internal PGA and AC Excitation (CN0155)
標準包裝： 1
位數(shù)： 24
通道數(shù)： 4
電壓 - 電源，模擬： 4.75 V ~ 5.25 V
電壓 - 電源，數(shù)字： 2.7 V ~ 5.25 V
封裝/外殼： 32-WFQFN 裸露焊盤，CSP
供應商設備封裝： 32-LFCSP-WQ（5x5）
包裝： 托盤
AD7195
Rev. 0 | Page 41 of 44
SUMMARY OF FILTER OPTIONS
The 50 Hz/60 Hz rejection can be improved by setting the
REJ60 bit in the mode register to 1. With FS[9:0] set to 96 and
REJ60 set to 1, the filter response shown in Figure 49 is achieved.
The output data rate is unchanged, but the 50 Hz/60 Hz ± 1 Hz
rejection improves to 73 dB typically.
The AD7195 has several filter options. The filter that is chosen
affects the output data rate, settling time, the rms noise, the stop
band attenuation, and the 50 Hz/60 Hz rejection.
Table 35 shows some sample configurations and the corres-
ponding performance in terms of throughput, settling time and
50 Hz/60 Hz rejection.
–120
–110
–100
–90
–80
–70
–60
–50
–40
–30
–20
–10
0
25
50
75
100
125
150
FREQUENCY (Hz)
F
IL
T
E
R
GA
IN
(
d
B
)
08
77
1-
05
9
Figure 49. Sinc3 Filter Response
(FS[9:0] = 96, Chop Enabled, REJ60 = 1)
Table 35. Filter Summary1
Filter
FS[9:0]
Output Data
Rate (Hz)
Settling
Time (ms)
Throughput2 (Hz)
REJ60
50 Hz Rejection (dB)
Sinc4, Chop Disabled3
1
4800
0.83
1200
0
No 50 Hz or 60 Hz rejection
Sinc4, Chop Disabled
5
960
4.17
240
0
No 50 Hz or 60 Hz rejection
Sinc3, Chop Disabled
5
960
3.125
320
0
No 50 Hz or 60 Hz rejection
Sinc4, Chop Disabled
480
10
400
2.5
0
120 dB ( 50 Hz and 60 Hz)
Sinc3, Chop Disabled
480
10
300
3.33
0
100 dB (50 Hz and 60 Hz)
Sinc4, Chop Disabled
96
50
80
12.5
0
120 dB (50 Hz only)
Sinc4, Chop Disabled
96
50
80
12.5
1
82 dB ( 50 Hz and 60 Hz)
Sinc3, Chop Disabled
96
50
60
16.7
0
95 dB (50 Hz only)
Sinc3, Chop Disabled
96
50
60
16.7
1
67 dB ( 50 Hz and 60 Hz)
Sinc4, Chop Disabled
80
60
66.67
15
0
120 dB (60 Hz only)
Sinc3, Chop Disabled
80
60
50
20
0
95 dB (60 Hz only)
Sinc4, Chop Disabled, Zero
Latency
96
12.5
80
12.5
0
120 dB (50 Hz only)
Sinc4, Chop Disabled, Zero
Latency
96
12.5
80
12.5
1
82 dB ( 50 Hz and 60 Hz)
Sinc4, Chop Disabled, Zero
Latency
80
15
66.67
15
0
120 dB (60 Hz only)
Sinc4, Chop Enabled
96
12.5
160
6.25
1
80 dB (50 Hz and 60 Hz)
Sinc3, Chop Enabled
96
16.7
120
8.33
1
67 dB (50 Hz and 60 Hz)
1 These calculations assume a 4.92 MHz stable master clock.
2 Throughput is the rate at which conversions are available when several channels are enabled. In zero latency mode, the output data rate and throughput are equal.
3 For output dates rates greater than 1 kHz, the sinc4 filter is recommended.
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