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參數(shù)資料
| 型號(hào)： | AD6459ARS |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | 通信及網(wǎng)絡(luò) |
| 英文描述： | GSM 3 V Receiver IF Subsystem |
| 中文描述： | SPECIALTY TELECOM CIRCUIT, PDSO20 |
| 封裝： | PLASTIC, SSOP-20 |
| 文件頁(yè)數(shù)： | 11/12頁(yè) |
| 文件大小： | 314K |
| 代理商： | AD6459ARS |
AD6459
–11–
REV. 0
14
13
12
11
17
16
15
20
19
18
10
9
8
1
2
3
4
7
6
5
AD6459
FREF
IRXP
VPS2
FLTR
VPS1
COM1
PRUP
LOIP
QRXN
QRXP
IRXN
RFLO
RFHI
COM2
GREF
MXOP
MXOM
IFIP
IFIM
GAIN
R1
20k
VPOS
C1
0.1μF
C10 1nF
R8 1k
C11
C9
10nF
FREF
R9
50
R2
50
LOIP
RFHI
GREF
R3
50
C12
1nF
C4 1nF
C7
1nF
VPOS
IRXP
QRXN
QRXP
IRXN
GAIN
C2
1nF
SC3
0.1C5
JUMPER
VPOS
R6
24.9k
R7
16.9k
SL3
C16
C15
110pF
L2
PRUP
GND
GREF
SL4
C17
Figure 27. Evaluation Board as Received with 19.5 MHz Filter
Table II. AD6459 Evaluation Board Input and Output Connection
Reference
Designation
Connector
Type
Approximate
Signal Level
Description
Coupling
Comments
RFHI
SMA
RF Input
AC
–11 dBm max
Input Is Terminated
in 50
Input Is Terminated
in 50
Input Is Terminated
in 50
Not Connected
for Unbalanced Output
Use XFMR
Not Connected
for Unbalanced Output
Use XFMR
Two Resistors Divider
Gain Scaling Reference
from External ADC
Maw Gain at 0.2 V
Z Series = 4.7 k
Z Series = 4.7 k
Z Series = 4.7 k
Z Series = 4.7 k
Supply Voltage
LOIP
SMA
LO Input
AC
500 mV p-p max
FREF
SMA
Demodulator Reference
Input
Mixer Output
AC
100 mV p-p min
MXOP
SMA
NA
NA
IFIP
SMA
IF Input
NA
NA
J1
GREF
Jumper
J2-1
On-Board GREF Bias
External Reference Input
DC
DC
0.4 V
POS
1.2 V dc
GAIN
QRXN
QRXP
IRXN
IRXP
VPOS
J2-2
J2-3
J2-4
J2-5
J2-6
J2-7
Gain Bias Input
Q-Negative Output
Q-Positive Output
I-Negative Output
I-Positive Output
Power Supply
Positive Input
Power Up
DC
DC–2 MHz
DC–2 MHz
DC-2 MHz
DC-2 MHz
DC
0.2 V to 2.4 V dc
NA
NA
NA
NA
2.7 V to 5.5 V
PRUP
J2-8
DC-2 MHz
CMOS
If Left Unconnected,
Board Is Active
NA
NA
GND
GND
J2-J9
J2-10
Ground
Ground
DC
DC
0 V
0 V
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