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參數(shù)資料
| 型號(hào)： | AD6459 |
| 廠商： | Analog Devices, Inc. |
| 英文描述： | GSM 3 V Receiver IF Subsystem |
| 中文描述： | 3伏的GSM接收機(jī)中頻子系統(tǒng) |
| 文件頁數(shù)： | 9/12頁 |
| 文件大小： | 314K |
| 代理商： | AD6459 |
AD6459
–9–
REV. 0
The output of the mixer is differential. The nominal conversion
gain is specified for operation into a 19.5 MHz LC IF bandpass
filter as shown in Figure
21 and Table I.
The conversion gain is measured between the mixer input and
the input of this filter and varies between –5 dB and +15 dB.
MXOP
MXOM
C2
L1
C1
C1
IFIP
IFIM
Figure 21. Suggested IF Filter Inserted Between the
Mixer’s Output Port and the Amplifier’s Input Port
Table I. Filter Component Values for Selected Frequencies
Frequency
C1
L1
C2
13 MHz
19.5 MHz
26 MHz
40 MHz
27 pF
27 pF
22 pF
22 pF
0.82
μ
H
0.56
μ
H
0.39
μ
H
0.12
μ
H
180 pF
110 pF
82 pF
100 pF
The maximum permissible signal level between MXOP and
MXOM
is determined by the maximum gain control voltage.
The mixer output port, having pull-up resistors of 250
to
V
POS
, is shown in Figure 22.
MXOP
MXOM
250
250
V
POS
Figure 22. Mixer Output Port
IF Amplifier
Most of the gain in the AD6459 is provided by the IF amplifier
strip, which comprises two stages. Both are fully differential and
each has a gain span of 26 dB for the AGC voltage range of 0.2
V to 2.25 V. Thus, in conjunction with the variable gain of the
mixer, the total gain span is 76 dB. The overall IF gain varies
from –13 dB to 45 dB for the nominal AGC voltage of 0.2 V to
2.25 V. Maximum gain is at V
GAIN
= 0.2 V.
The IF input is differential, at IFIP and IFIM. Figure 23
shows
a simplified schematic of the IF interface modeled as parallel
RC network.
The IF’s small-signal bandwidth is approximately 50 MHz from
IFIP and IFIM through the demodulator.
IFHI
IFLO
C
SH
R
SH
Figure 23. IF Amplifier Port Modeled as a Parallel RC
Network
Gain Scaling
The AD6459’s overall gain, expressed in decibels, is linear with
respect to the AGC voltage V
GAIN
at pin GAIN. The gain of all
sections is maximum when V
GAIN
is 0.2 V and falls off as the
bias is increased to V
GAIN
= 2.25 V. The gain is independent
of the power supply voltage. The gain of all stages changes
simultaneously. The AD6459’s gain scaling is also tempera-
ture compensated.
Note that GAIN pin of the AD6459 is an input driven by an
external low impedance voltage source, normally a DAC, under
the control of the radio’s digital processor.
The gain-control scaling is directly proportional to the reference
voltage applied to the pin GREF
and is
independent of the
power supply voltage. When this input is set to the nominal
value of 1.2 V, the scale is nominally 27 mV/dB (37 dB/V).
Under these conditions, 76 dB of gain range (mixer plus IF)
corresponds to a control voltage of 0.2 V
≤
V
GAIN
%
2.25 V.
The final centering of this 2.05 V range depends on the inser-
tion losses of the IF filters used.
Pin GREF can be tied to an external voltage reference (V
REF
)
provided, for example, by an AD1580 (1.21 V) voltage reference.
When using the Analog Devices AD7013 (IS54, TETRA, and
satellite receiver applications) and AD7015 or AD6421 (GSM,
DCS1800, PCS1900) baseband converters, the external refer-
ence may also be provided by the reference output of the
baseband converters. The interface between the AD6459 and
the AD6421 baseband converter is shown in Figure 24. The
AD7015 baseband converter provides a V
R
of 1.23 V. An auxil-
iary DAC in the AD7015 can be used to generate the AGC
voltage. Since it uses the same reference voltage, the numerical
input to this DAC provides an accurate RSSI value in digital
form, no longer requiring the reference voltage to have high
absolute accuracy.
AD6459
IRXP
IRXN
QRXP
QRXP
GREF
GAIN
FREF
AD6421
100pF
100pF
100pF
100pF
0.1μF
160
1nF
VCTCXO
IRXP
IRXP
IRXP
IRXN
BREFOUT
BREFCAP
AGC DAC
AFC DAC
Figure 24. Interfacing the AD6459 to the AD6421
Baseband Converter
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