參數(shù)資料
型號: AD628ARMZ-RL
廠商: ANALOG DEVICES INC
元件分類: 運動控制電子
英文描述: High Common-Mode Voltage, Programmable Gain Difference Amplifier
中文描述: OP-AMP, 1500 uV OFFSET-MAX, PDSO8
封裝: ROHS COMPLIANT, MO-187AA, MSOP-8
文件頁數(shù): 15/20頁
文件大?。?/td> 298K
代理商: AD628ARMZ-RL
AD628
APPLICATIONS
GAIN ADJUSTMENT
The AD628 system gain is provided by an architecture
consisting of two amplifiers. The gain of the input stage
is fixed at 0.1; the output buffer is user-adjustable as
G
A2
= 1 +
R
EXT1
/
R
EXT2
. The system gain is then
Rev. F | Page 15 of 20
+
×
=
EXT2
EXT1
TOTAL
G
R
R
1
0.1
(1)
At a 2 nA maximum, the input bias current of the buffer amplifier
is very low and any offset voltage induced at the buffer amplifier
by its bias current may be neglected (2 nA × 10 kΩ = 20 μV).
However, to absolutely minimize bias current effects, select R
EXT1
and R
EXT2
so that their parallel combination is 10 kΩ. If practical
resistor values force the parallel combination of R
EXT1
and R
EXT2
below 10 kΩ, add a series resistor (R
EXT3
) to make up for the
difference. Table 5 lists several values of gain and corresponding
resistor values.
Table 5. Nearest Standard 1% Resistor Values for
Various Gains
1
Total Gain
(V/V)
(V/V)
0.1
1
0.2
2
0.25
2.5
0.5
5
1
10
2
20
5
50
10
100
A2 Gain
R
EXT1
(Ω)
10 k
20 k
25.9 k
49.9 k
100 k
200 k
499 k
1 M
R
EXT2
(Ω)
20 k
18.7 k
12.4 k
11 k
10.5 k
10.2 k
10.2 k
R
EXT3
(Ω)
0
0
0
0
0
0
0
0
1
See
Figure 29
.
To set the system gain to less than 0.1, create an attenuator by
placing Resistor R
EXT4
from Pin 4 (C
FILT
) to the reference voltage.
A divider is formed by the 10 kΩ resistor that is in series with
the positive input of A2 and Resistor R
EXT4
. A2 is configured for
unity gain.
Using a divider and setting A2 to unity gain yields
1
×
+
×
=
EXT4
EXT4
DIVIDER
W
R
R
G
10
0.1
/
INPUT VOLTAGE RANGE
VREF and the supply voltage determine the common-mode
input voltage range. The relation is expressed by
+
)
V
.
(
REF
S
CM
V
V
V
UPPER
10
2
1
11
(2)
REF
S
CM
V
V
(
10
2
1
11
+
)
V
.
V
LOWER
where V
S+
is the positive supply, V
S
is the negative supply,
and 1.2 V is the headroom needed for suitable performance.
Equation 2 provides a general formula for calculating the
common-mode input voltage range. However, keep the AD628
within the maximum limits listed in Table 1 to maintain
optimal performance. This is illustrated in Figure 30 where the
maximum common-mode input voltage is limited to ±120 V.
Figure 31 shows the common-mode input voltage bounds for
single-supply voltages.
–200
–150
–100
–50
0
50
I
100
150
200
8
6
2
4
0
10
12
1
SUPPLY VOLTAGE (±V)
0
4
16
MAXIMUM INPUT COMMON-MODE
VOLTAGE WHEN V
REF
= GND
Figure 30. Input Common-Mode Voltage vs. Supply Voltage
for Dual Supplies
–80
–60
–40
–20
0
20
40
60
80
100
I
8
6
2
4
0
10
12
1
SINGLE-SUPPLY VOLTAGE (V)
0
4
16
MAXIMUM INPUT COMMON-MODE
VOLTAGE WHEN V
REF
= MIDSUPPLY
Figure 31. Input Common-Mode Voltage vs.
Supply Voltage for Single Supplies
相關(guān)PDF資料
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