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參數(shù)資料
| 型號(hào)： | AD606JRZ-REEL7 |
| 廠商： | Analog Devices Inc |
| 文件頁(yè)數(shù)： | 1/12頁(yè) |
| 文件大?。?/td> | 0K |
| 描述： | IC AMP LOG LP 1.2MA 16SOIC |
| 標(biāo)準(zhǔn)包裝： | 1,000 |
| 放大器類型： | 對(duì)數(shù) |
| 電路數(shù)： | 1 |
| 輸出類型： | 差分 |
| 電流 - 輸入偏壓： | 4µA |
| 電流 - 電源： | 13mA |
| 電流 - 輸出 / 通道： | 1.2mA |
| 電壓 - 電源，單路/雙路(±)： | 4.5 V ~ 5.5 V |
| 工作溫度： | 0°C ~ 70°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 16-SOIC（0.154"，3.90mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 16-SOIC |
| 包裝： | 帶卷 (TR) |
REV. B
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
a
50 MHz, 80 dB Demodulating
Logarithmic Amplifier with Limiter Output
AD606
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700
World Wide Web Site: http://www.analog.com
Fax: 781/326-8703
Analog Devices, Inc., 1999
FEATURES
Logarithmic Amplifier Performance
–75 dBm to +5 dBm Dynamic Range
≤1.5 nV/√Hz Input Noise
Usable to >50 MHz
37.5 mV/dB Voltage Output
On-Chip Low-Pass Output Filter
Limiter Performance
1 dB Output Flatness over 80 dB Range
3 Phase Stability at 10.7 MHz over 80 dB Range
Adjustable Output Amplitude
Low Power
+5 V Single Supply Operation
65 mW Typical Power Consumption
CMOS-Compatible Power-Down to 325
W typ
<5
s Enable/Disable Time
APPLICATIONS
Ultrasound and Sonar Processing
Phase-Stable Limiting Amplifier to 100 MHz
Received Signal Strength Indicator (RSSI)
Wide Range Signal and Power Measurement
PRODUCT DESCRIPTION
The AD606 is a complete, monolithic logarithmic amplifier
using a 9-stage “successive-detection” technique. It provides
both logarithmic and limited outputs. The logarithmic output is
from a three-pole post-demodulation low-pass filter and provides
a loadable output voltage of +0.1 V dc to +4 V dc. The logarith-
mic scaling is such that the output is +0.5 V for a sinusoidal
input of –75 dBm and +3.5 V at an input of +5 dBm; over this
range the logarithmic linearity is typically within
±0.4 dB. All
scaling parameters are proportional to the supply voltage.
The AD606 can operate above and below these limits, with
reduced linearity, to provide as much as 90 dB of conversion
range. A second low-pass filter automatically nulls the input
offset of the first stage down to the submicrovolt level. Adding
external capacitors to both filters allows operation at input fre-
quencies as low as a few hertz.
The AD606’s limiter output provides a hard-limited signal
output as a differential current of
±1.2 mA from open-collector
outputs. In a typical application, both of these outputs are
loaded by 200
resistors to provide a voltage gain of more than
90 dB from the input. Transition times are 1.5 ns, and the
phase is stable to within
±3° at 10.7 MHz for signals from
–75 dBm to +5 dBm.
The logarithmic amplifier operates from a single +5 V supply
and typically consumes 65 mW. It is enabled by a CMOS logic
level voltage input, with a response time of <5
s. When dis-
abled, the standby power is reduced to <1 mW within 5
s.
The AD606J is specified for the commercial temperature range
of 0
°C to +70°C and is available in 16-lead plastic DIPs or
SOICs. Consult the factory for other packages and temperature
ranges.
FUNCTIONAL BLOCK DIAGRAM
REFERENCE
AND POWER-UP
ONE-POLE
FILTER
FINAL
LIMITER
MAIN SIGNAL PATH
11.15dB/STAGE
OFFSET-NULL
LOW-PASS FILTER
30pF
360k
2pF
9.375k
2pF
X2
TWO-POLE
SALLEN-KEY
FILTER
12 A/dB
2 A/dB
HIGH-END
DETECTORS
AD606
1.5k
250
30k
9
10
11
12
13
14
15
16
12
345
67
8
INLO
COMM
ISUM
ILOG
BFIN
VLOG
OPCM
LMLO
LMHI
LADJ
FIL2
FIL1
VPOS
PRUP
COMM
INHI
X1
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