參數(shù)資料
型號(hào): AD602ARZ-RL
廠商: Analog Devices Inc
文件頁(yè)數(shù): 31/33頁(yè)
文件大?。?/td> 0K
描述: IC AMP VGA DUAL LN 50MA 16SOIC
標(biāo)準(zhǔn)包裝: 1,000
系列: X-AMP®
放大器類(lèi)型: 可變?cè)鲆?br>
電路數(shù): 2
轉(zhuǎn)換速率: 275 V/µs
-3db帶寬: 35MHz
電流 - 輸入偏壓: 350nA
電流 - 電源: 11mA
電流 - 輸出 / 通道: 50mA
電壓 - 電源,單路/雙路(±): ±4.75 V ~ 5.25 V
工作溫度: -40°C ~ 85°C
安裝類(lèi)型: 表面貼裝
封裝/外殼: 16-SOIC(0.295",7.50mm 寬)
供應(yīng)商設(shè)備封裝: 16-SOIC W
包裝: 帶卷 (TR)
AD600/AD602
Rev. F | Page 6 of 32
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
VPOS
VNEG
1
2
3
4
5
6
16
15
14
13
12
11
7
8
10
9
REF
A1
A2
AD600 /
AD602
+
C1HI
A1CM
A1OP
A2OP
C1LO
A1HI
+
A2CM
C2HI
A1LO
GAT1
A2LO
GAT2
A2HI
C2LO
00
53
8-
00
2
Figure 2. Pin Configuration
Table 3. Pin Function Descriptions
Pin No.
Mnemonic
Description
1
C1LO
CH1 Gain-Control Input Low. Positive voltage reduces CH1 gain.
2
A1HI
CH1 Signal Input High. Positive voltage increases CH1 output.
3
A1LO
CH1 Signal Input Low. Usually connected to CH1 input ground.
4
GAT1
CH1 Gating Input. A logic high shuts off the CH1 signal path.
5
GAT2
CH2 Gating Input. A logic high shuts off the CH2 signal path.
6
A2LO
CH2 Signal Input Low. Usually connected to CH2 input ground.
7
A2HI
CH2 Signal Input High. Positive voltage increases CH2 output.
8
C2LO
CH2 Gain-Control Input Low. Positive voltage reduces CH2 gain.
9
C2HI
CH2 Gain-Control Input High. Positive voltage increases CH2 gain.
10
A2CM
CH2 Common. Usually connected to CH2 output ground.
11
A2OP
CH2 Output.
12
VNEG
Negative Supply for Both Amplifiers.
13
VPOS
Positive Supply for Both Amplifiers.
14
A1OP
CH1 Output.
15
A1CM
CH1 Common. Usually connected to CH1 output ground.
16
C1HI
CH1 Gain-Control Input High. Positive voltage increases CH1 gain.
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