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參數(shù)資料
| 型號(hào)： | AD5764R |
| 廠商： | Analog Devices, Inc. |
| 英文描述： | Complete Quad, 16-Bit, High Accuracy, Serial Input, Bipolar Voltage Output DAC |
| 中文描述： | 完整的四，16位，高精度，串行輸入，雙極性電壓輸出DAC |
| 文件頁數(shù)： | 7/32頁 |
| 文件大?。?/td> | 524K |
| 代理商： | AD5764R |
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AD5764R
TIMING CHARACTERISTICS
AV
DD
= 11.4 V to 16.5 V, AV
SS
= 11.4 V to 16.5 V, AGND = DGND = REFGND = PGND = 0 V; REFAB = REFCD = 5 V external;
DV
CC
= 2.7 V to 5.25 V, R
LOAD
= 10 kΩ, C
L
= 200 pF. All specifications T
MIN
to T
MAX
, unless otherwise noted.
Table 3.
Parameter
1, 2, 3
Limit at T
MIN
, T
MAX
Unit
t
1
33
ns min
t
2
13
ns min
t
3
13
ns min
t
4
13
ns min
t
54
13
ns min
t
6
40
ns min
t
7
2
ns min
t
8
5
ns min
t
9
1.4
μs min
400
ns min
t
10
10
ns min
t
11
500
ns max
t
12
10
μs max
t
13
10
ns min
t
14
2
μs max
t
155, 6
25
ns max
t
16
20
ns min
t
17
2
μs min
t
18
170
ns min
1
Guaranteed by design and characterization; not production tested.
2
All input signals are specified with t
r
= t
f
= 5 ns (10% to 90% of DV
CC
) and timed from a voltage level of 1.2 V.
3
See Figure 2, Figure 3, and Figure 4.
4
Standalone mode only.
5
Measured with the load circuit of Figure 5.
6
Daisy-chain mode only.
Rev. PrA | Page 7 of 32
Description
SCLK cycle time
SCLK high time
SCLK low time
SYNC falling edge to SCLK falling edge setup time
24
th
SCLK falling edge to SYNC rising edge
Minimum SYNC high time
Data setup time
Data hold time
SYNC rising edge to LDAC falling edge (all DACs updated)
SYNC rising edge to LDAC falling edge (single DAC updated)
LDAC pulse width low
LDAC falling edge to DAC output response time
DAC output settling time
CLR pulse width low
CLR pulse activation time
SCLK rising edge to SDO valid
SYNC rising edge to SCLK rising edge
SYNC rising edge to DAC output response time (LDAC = 0)
LDAC falling edge to SYNC rising edge
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| AD5764RBSUZ-REEL7 | 功能描述:IC DAC QUAD 16BIT VOUT 32-TQFP RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 數(shù)模轉(zhuǎn)換器 系列:- 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:1,000 系列:- 設(shè)置時(shí)間:1µs 位數(shù):8 數(shù)據(jù)接口:串行 轉(zhuǎn)換器數(shù)目:8 電壓電源:雙 ± 功率耗散（最大）:941mW 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:24-SOIC（0.295"，7.50mm 寬） 供應(yīng)商設(shè)備封裝:24-SOIC W 包裝:帶卷 (TR) 輸出數(shù)目和類型:8 電壓，單極 采樣率（每秒）:* |
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