- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄1979 > AD5763CSUZ-REEL7 (Analog Devices Inc)DAC 16BIT DUAL 5V 2LSB 32-TQFP PDF資料下載
參數(shù)資料
| 型號(hào)： | AD5763CSUZ-REEL7 |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 14/28頁 |
| 文件大?。?/td> | 0K |
| 描述： | DAC 16BIT DUAL 5V 2LSB 32-TQFP |
| 產(chǎn)品培訓(xùn)模塊： | Data Converter Fundamentals DAC Architectures |
| 產(chǎn)品變化通告： | AD5763/65 Metal Layer Edit Change 08/Sept/2009 |
| 設(shè)計(jì)資源： | High Accuracy, Bipolar Voltage Output Digital-to-Analog Conversion Using AD5763 (CN0074) |
| 標(biāo)準(zhǔn)包裝： | 500 |
| 設(shè)置時(shí)間： | 8µs |
| 位數(shù)： | 16 |
| 數(shù)據(jù)接口： | 串行 |
| 轉(zhuǎn)換器數(shù)目： | 2 |
| 電壓電源： | 雙 ± |
| 功率耗散（最大）： | 45mW |
| 工作溫度： | -40°C ~ 105°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 32-TQFP |
| 供應(yīng)商設(shè)備封裝： | 32-TQFP（7x7） |
| 包裝： | 帶卷 (TR) |
| 輸出數(shù)目和類型： | 2 電壓，雙極 |
| 采樣率（每秒）： | * |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁當(dāng)前第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁
Data Sheet
AD5763
Rev. C | Page 21 of 28
WORKED EXAMPLE OF OFFSET AND GAIN
ADJUSTMENT
Using the information provided in the previous section, the
following worked example demonstrates how the functions
of the AD5763 can be used to eliminate both offset and gain
errors. Because the AD5763 is factory calibrated, offset and
gain errors should be negligible. However, errors can be intro-
duced by the system that the AD5763 is operating within; for
example, a voltage reference value that is not equal to 2.048 V
introduces a gain error. An output range of ±4.096 V and twos
complement data coding is assumed.
Removing Offset Error
The AD5763 can eliminate an offset error in the range of 2 mV to
+1.98 mV with a step size of of a 16-bit LSB.
Calculate the step size of the offset adjustment using the
following equation:
μV
625
.
15
8
2
192
.
8
16
=
×
=
Size
Step
Adjust
Offset
Measure the offset error by programming 0x0000 to the data
register and measuring the resulting output voltage. For this
example, the measured value is 614 μV.
Calculate the number of offset adjustment steps that this value
represents,
Steps
Size
Step
Offset
Value
Offset
Measured
Steps
of
Number
40
μV
625
.
15
μV
614
=
The offset error measured is positive, therefore, a negative
adjustment of 40 steps is required. The offset register is 8 bits
wide and the coding is twos complement. The required offset
register value can be calculated as follows:
Convert adjustment value to binary: 00101000.
Convert this to a negative twos complement number by
inverting all bits and adding 1: 11011000.
11011000 is the value that should be programmed to the offset
register.
Note that this twos complement conversion is not necessary
in the case of a positive offset adjustment. The value to be
programmed to the offset register is simply the binary
representation of the adjustment value.
Removing Gain Error
The AD5763 can eliminate a gain error at negative full-scale
output in the range of 2 mV to +1.94 mV with a step size of
of a 16-bit LSB.
Calculate the step size of the gain adjustment
μV
5
.
62
2
192
.
8
16
=
×
=
Size
Step
Adjust
Gain
Measure the gain error by programming 0x8000 to the data
register and measure the resulting output voltage. The gain
error is the difference between this value and 4.096 V; for
this example, the gain error is 0.8 mV.
Calculate how many gain adjustment steps this value represents
Steps
Size
Step
Gain
Value
Gain
Measured
Steps
of
Number
13
μV
5
.
62
mV
8
.
0
=
The gain error measured is negative (in terms of magnitude);
therefore, a positive adjustment of 13 steps is required. The gain
register is six bits wide and the coding is twos complement, the
required gain register value can be determined as follows:
Convert adjustment value to binary: 001101.
The value to be programmed to the gain register is simply this
binary number.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| AD5764CSUZ | IC DAC 16BIT QUAD VOUT 32TQFP |
| AD5764RBSUZ | IC DAC 16BIT QUAD VOUT 32-TQFP |
| AD5781BRUZ-REEL7 | IC DAC 18BIT SRL 20TSSOP |
| AD5790BCPZ | IC DAC VOLT OUT 20BIT 24LFCSP |
| AD5791BRUZ | IC DAC 20BIT SRL 20TSSOP |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AD5763CSUZ-TR | 制造商:Analog Devices 功能描述:16BIT +/-5V DUAL 1LSB - Tape and Reel |
| AD5764 | 制造商:AD 制造商全稱:Analog Devices 功能描述:Complete, Quad, 14/16-Bit, High Accuracy, Serial Input, Bipolar Voltage Output DAC |
| AD5764ASU | 制造商:AD 制造商全稱:Analog Devices 功能描述:Complete, Quad, 14/16-Bit, High Accuracy, Serial Input, Bipolar Voltage Output DAC |
| AD5764ASUZ | 功能描述:IC DAC 16BIT QUAD VOUT 32-TQFP RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 數(shù)模轉(zhuǎn)換器 系列:- 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:50 系列:- 設(shè)置時(shí)間:4µs 位數(shù):12 數(shù)據(jù)接口:串行 轉(zhuǎn)換器數(shù)目:2 電壓電源:單電源 功率耗散（最大）:- 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:8-TSSOP，8-MSOP（0.118"，3.00mm 寬） 供應(yīng)商設(shè)備封裝:8-uMAX 包裝:管件 輸出數(shù)目和類型:2 電壓，單極 采樣率（每秒）:* 產(chǎn)品目錄頁面:1398 (CN2011-ZH PDF) |
| AD5764ASUZ-REEL7 | 功能描述:IC DAC 16BIT QUAD VOUT 32-TQFP RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 數(shù)模轉(zhuǎn)換器 系列:- 產(chǎn)品培訓(xùn)模塊:Data Converter Fundamentals DAC Architectures 標(biāo)準(zhǔn)包裝:750 系列:- 設(shè)置時(shí)間:7µs 位數(shù):16 數(shù)據(jù)接口:并聯(lián) 轉(zhuǎn)換器數(shù)目:1 電壓電源:雙 ± 功率耗散（最大）:100mW 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:28-LCC（J 形引線） 供應(yīng)商設(shè)備封裝:28-PLCC（11.51x11.51） 包裝:帶卷 (TR) 輸出數(shù)目和類型:1 電壓，單極；1 電壓，雙極 采樣率（每秒）:143k |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。