參數(shù)資料
型號(hào): AD5752RBREZ
廠商: Analog Devices Inc
文件頁(yè)數(shù): 24/32頁(yè)
文件大小: 0K
描述: IC DAC DUAL 16BIT SERIAL 24TSSOP
產(chǎn)品培訓(xùn)模塊: Data Converter Fundamentals
DAC Architectures
設(shè)計(jì)資源: Software Configurable 16-Bit Dual-Channel Unipolar/Bipolar Voltage Output Using AD5752R (CN0089)
標(biāo)準(zhǔn)包裝: 1
設(shè)置時(shí)間: 10µs
位數(shù): 16
數(shù)據(jù)接口: 串行
轉(zhuǎn)換器數(shù)目: 2
電壓電源: 模擬和數(shù)字,雙 ±
功率耗散(最大): 190mW
工作溫度: -40°C ~ 85°C
安裝類(lèi)型: 表面貼裝
封裝/外殼: 24-TSSOP(0.173",4.40mm)裸露焊盤(pán)
供應(yīng)商設(shè)備封裝: 24-TSSOP 裸露焊盤(pán)
包裝: 管件
輸出數(shù)目和類(lèi)型: 2 電壓,單極;2 電壓,雙極
采樣率(每秒): 1.07M
產(chǎn)品目錄頁(yè)面: 784 (CN2011-ZH PDF)
AD5722R/AD5732R/AD5752R
Rev. D | Page 30 of 32
APPLICATIONS INFORMATION
+5 V/±5 V OPERATION
When operating from a single +5 V supply or a dual ±5 V
supply, an output range of +5 V or ±5 V is not achievable
because sufficient headroom for the output amplifier is not
available. In this situation, a reduced reference voltage can be
used. For example, a 2 V reference voltage produces an output
range of +4 V or ±4 V, and the 1 V of headroom is more than
enough for full operation. A standard value voltage reference
of 2.048 V can be used to produce output ranges of +4.096 V
and ±4.096 V. Refer to the plots in the Typical Performance
Characteristics section for performance data at a range of
voltage reference values.
LAYOUT GUIDELINES
In any circuit where accuracy is important, careful considera-
tion of the power supply and ground return layout helps to
ensure the rated performance. The printed circuit board on
which the AD5722R/AD5732R/AD5752R are mounted should
be designed so that the analog and digital sections are separated
and confined to certain areas of the board. If the AD5722R/
AD5732R/AD5752R are in a system where multiple devices
require an AGND-to-DGND connection, the connection should
be made at one point only. The star ground point should be
established as close as possible to the device.
The AD5722R/AD5732R/AD5752R should have ample supply
bypassing of a 10 μF capacitor in parallel with a 0.1 μF capacitor
on each supply located as close to the package as possible,
ideally right up against the device. The 10 μF capacitors are the
tantalum bead type. The 0.1 μF capacitor should have low
effective series resistance (ESR) and low effective series
inductance (ESI), such as the common ceramic types, which
provide a low impedance path to ground at high frequencies to
handle transient currents due to internal logic switching.
The power supply lines of the AD5722R/AD5732R/AD5752R
should use as large a trace as possible to provide low impedance
paths and reduce the effects of glitches on the power supply line.
Fast switching signals, such as clock signals, should be shielded
with digital ground to avoid radiating noise to other parts of the
board, and they should never be run near the reference inputs.
A ground line routed between the SDIN and SCLK lines helps
reduce crosstalk between these lines (this is not required on a
multilayer board that has a separate ground plane, but separating
the lines does help). It is essential to minimize noise on the
REFIN line because noise couples through to the DAC output.
Avoid crossover of digital and analog signals. Traces on opposite
sides of the board should run at right angles to each other. This
reduces the effects of feedthrough on the board. A microstrip
technique is by far the best method, but it is not always possible
with a double-sided board. In this technique, the component side
of the board is dedicated to a ground plane, and signal traces
are placed on the solder side.
GALVANICALLY ISOLATED INTERFACE
In many process control applications, it is necessary to provide
an isolation barrier between the controller and the unit being
controlled to protect and isolate the controlling circuitry from
any hazardous common-mode voltages that may occur. The
i
Coupler family of products from Analog Devices, Inc., provides
voltage isolation in excess of 2.5 kV. The serial loading structure
of the AD5722R/AD5732R/AD5752R makes them ideal for
isolated interfaces because the number of interface lines is kept
to a minimum. Figure 49 shows a 4-channel isolated interface to
the AD5722R/AD5732R/AD5752R using an ADuM1400. For
more information, visit http://www.analog.com/icouplers.
ENCODE
DECODE
ENCODE
DECODE
ENCODE
DECODE
VIA
VIB
VIC
VID
VOA
VOB
VOC
VOD
ENCODE
DECODE
ADuM1400*
MICROCONTROLLER
SERIAL CLOCK OUT
SERIAL DATA OUT
SYNC OUT
CONTROL OUT
TO SCLK
TO SDIN
TO SYNC
TO LDAC
*ADDITIONAL PINS OMITTED FOR CLARITY.
064
66
-01
1
Figure 49. Isolated Interface
MICROPROCESSOR INTERFACING
Microprocessor interfacing to the AD5722R/AD5732R/AD5752R
is via a serial bus that uses standard protocol compatible with
microcontrollers and DSP processors. The communications
channel is a 3-wire (minimum) interface consisting of a clock
signal, a data signal, and a synchronization signal. Each AD5722R/
AD5732R/AD5752R requires a 24-bit data-word with data valid
on the falling edge of SCLK.
For all interfaces, the DAC output update can be initiated
automatically when all the data is clocked in, or it can be
performed under the control of LDAC. The contents of the
registers can be read using the readback function.
AD5722R/AD5732R/AD5752R to Blackfin DSP Interface
Figure 50 shows how the AD5722R/AD5732R/AD5752R can be
interfaced to Analog Devices Blackfin DSP. The Blackfin has an
integrated SPI port that can be connected directly to the SPI pins
of the AD5722R/AD5732R/AD5752R and the programmable I/O
pins that can be used to set the state of a digital input, such as
the LDAC pin.
SYNC
ADSP-BF531
AD5722R/
AD5732R/
AD5752R
SCLK
SDIN
SPISELx
SCK
MOSI
LDAC
PF10
06
46
6-
01
2
Figure 50. AD5722R/AD5732R/AD5752R-to-Blackfin Interface
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