參數(shù)資料
型號: AD5732AREZ-REEL7
廠商: Analog Devices Inc
文件頁數(shù): 22/32頁
文件大小: 0K
描述: IC DAC DUAL 14BIT SERIAL 24TSSOP
產(chǎn)品培訓模塊: Data Converter Fundamentals
DAC Architectures
設計資源: Software Configurable 14-Bit Dual-Channel Unipolar/Bipolar Voltage Output Using AD5732 (CN0093)
標準包裝: 1,000
設置時間: 10µs
位數(shù): 14
數(shù)據(jù)接口: 串行
轉(zhuǎn)換器數(shù)目: 2
電壓電源: 模擬和數(shù)字,雙 ±
功率耗散(最大): 190mW
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 24-TSSOP(0.173",4.40mm)裸露焊盤
供應商設備封裝: 24-TSSOP 裸露焊盤
包裝: 帶卷 (TR)
輸出數(shù)目和類型: 2 電壓,單極;2 電壓,雙極
采樣率(每秒): *
AD5722/AD5732/AD5752
Rev. D | Page 29 of 32
long-term drift specification ensures that the overall
solution remains relatively stable over its entire lifetime.
Reference output voltage noise needs to be considered in
high accuracy applications that have relatively low noise
budgets. It is important to choose a reference with as low
an output noise voltage as practical for the required system
resolution. Precision voltage references such as the ADR431
(XFET design) produce low output noise in the 0.1 Hz to
10 Hz range. However, as the circuit bandwidth increases,
filtering the output of the reference may be required to
minimize the output noise.
MICROPROCESSOR INTERFACING
Microprocessor interfacing to the AD5722/AD5732/AD5752 is
via a serial bus that uses a standard protocol compatible with
microcontrollers and DSP processors. The communications
channel is a 3-wire (minimum) interface consisting of a clock
signal, a data signal, and a synchronization signal. The AD5722/
AD5732/AD5752 require a 24-bit data-word with data valid on
the falling edge of SCLK.
For all interfaces, the DAC output update can be initiated
automatically when all the data is clocked in, or it can be
performed under the control of LDAC. The contents of the
registers can be read using the readback function.
AD5722/AD5732/AD5752 to Blackfin DSP Interface
Figure 44 shows how the AD5722/AD5732/AD5752 can be
interfaced to the Analog Devices Blackfin DSP. The Blackfin has
an integrated SPI port that can be connected directly to the SPI
pins of the AD5722/AD5732/AD5752 and the programmable I/O
pins that can be used to set the state of a digital input such as
the LDAC pin.
SYNC
ADSP-BF531
AD5722/
AD5732/
AD5752
SCLK
SDIN
SPISELx
SCK
MOSI
LDAC
PF10
06
46
7-
01
2
Figure 44. AD5722/AD5732/AD5752 to Blackfin Interface
Table 28. Some Precision References Recommended for Use with the AD5722/AD5732/AD5752
Part No.
Initial Accuracy (mV max)
Long-Term Drift (ppm typ)
Temp Drift (ppm/°C max)
0.1 Hz to 10 Hz Noise (μV p-p typ)
40
3
3.5
±1
50
3
1.75
±2.5
50
3
6
±2
50
8
±1
20
3
4
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