VOUT
參數(shù)資料
型號(hào): AD5328BRUZ-REEL7
廠商: Analog Devices Inc
文件頁數(shù): 15/28頁
文件大小: 0K
描述: IC DAC 12BIT OCTAL BUFF 16TSSOP
產(chǎn)品培訓(xùn)模塊: Data Converter Fundamentals
DAC Architectures
標(biāo)準(zhǔn)包裝: 1,000
設(shè)置時(shí)間: 6µs
位數(shù): 12
數(shù)據(jù)接口: 串行
轉(zhuǎn)換器數(shù)目: 8
電壓電源: 單電源
功率耗散(最大): 4.5mW
工作溫度: -40°C ~ 105°C
安裝類型: 表面貼裝
封裝/外殼: 16-TSSOP(0.173",4.40mm 寬)
供應(yīng)商設(shè)備封裝: 16-TSSOP
包裝: 帶卷 (TR)
輸出數(shù)目和類型: 8 電壓,單極;8 電壓,雙極
采樣率(每秒): 167k
AD5308/AD5318/AD5328
Rev. F | Page 22 of 28
0.1
μF
02812-042
10
μF
GND
DIN
AD5308/AD5318/
AD5328
VOUTB
VOUTC
VOUTD
VOUTE
VOUTF
VOUTG
VOUTH
VOUTA
VREFABCD
VREFEFGH
VDD
10k
Ω
5V
REGULATOR
SCLK
SYNC
SCLK
VDD
10k
Ω
SYNC
POWER
VDD
10k
Ω
DIN
Figure 42. AD5308/AD5318/AD5328 in an Opto-Isolated Interface
DECODING MULTIPLE AD5308/AD5318/AD5328s
The SYNC pin on the AD5308/AD5318/AD5328 can be used in
applications to decode a number of DACs. In this application,
the DACs in the system receive the same serial clock and serial
data but only the SYNC to one of the devices is active at any one
time, allowing access to four channels in this 16-channel sys-
tem. The 74HC139 is used as a 2-to-4 line decoder to address
any of the DACs in the system. To prevent timing errors from
occurring, the enable input should be brought to its inactive
state while the coded-address inputs are changing state.
shows a diagram of a typical setup for decoding
multiple AD5308 devices in a system.
02812-
043
AD5308
SCLK
DIN
VOUTA
VOUTG
VOUTB
VOUTH
SYNC
DIN
SCLK
AD5308
SCLK
DIN
VOUTA
VOUTG
VOUTB
VOUTH
SYNC
74HC139
1G
1Y0
1Y1
1Y2
1Y3
ENABLE
CODED
ADDRESS
1A
1B
AD5308
SCLK
DIN
VOUTA
VOUTG
VOUTB
VOUTH
SYNC
AD5308
SCLK
DIN
VOUTA
VOUTG
VOUTB
VOUTH
SYNC
VCC
VDD
DGND
Figure 43. Decoding Multiple AD5308 Devices in a System
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PDF描述
AD5328BRUZ-REEL IC DAC 12BIT OCTAL BUFF 16TSSOP
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