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參數(shù)資料
| 型號： | AD5300* |
| 廠商： | Analog Devices, Inc. |
| 英文描述： | +2.7 V to +5.5 V. 140 uA. Rail-to-Rail Output 8-Bit DAC in an SOT-23 |
| 中文描述： | 2.7伏至5.5伏140微安。軌到軌輸出8位DAC，采用SOT - 23 |
| 文件頁數(shù)： | 2/12頁 |
| 文件大小： | 180K |
–2–
REV. A
AD5300–SPECIFICATIONS
(V
DD
= +2.7 V to +5.5 V; R
L
= 2 k
V
to GND; C
L
= 500 pF to GND; all specifications
T
MIN
to T
MAX
unless otherwise noted)
B Version
1
Typ
Max
Units
Conditions/Comments
Parameter
Min
STATIC PERFORMANCE
2
Resolution
Relative Accuracy
Differential Nonlinearity
Zero Code Error
Full-Scale Error
Gain Error
Zero Code Error Drift
Gain Temperature Coefficient
8
Bits
LSB
LSB
LSB
LSB
% of FSR
μ
V/
°
C
ppm of FSR/
°
C
±
1
±
0.25
+3.5
–3.5
±
1.25
See Figure 2.
Guaranteed Monotonic by Design. See Figure 3.
All Zeros Loaded to DAC Register. See Figure 6.
All Ones Loaded to DAC Register. See Figure 6.
+0.5
–0.5
–20
–5
OUTPUT CHARACTERISTICS
3
Output Voltage Range
Output Voltage Settling Time
0
V
DD
6
V
μ
s
4
1/4 Scale to 3/4 Scale Change (40 Hex to C0 Hex).
R
L
= 2 k
; 0 pF < C
L
< 500 pF. See Figure 16.
Slew Rate
Capacitive Load Stability
1
470
1000
20
0.5
1
50
20
2.5
5
V/
μ
s
pF
pF
nV-s
nV-s
mA
mA
μ
s
μ
s
R
L
=
∞
R
L
= 2 k
1 LSB Change Around Major Carry. See Figure 19.
Digital-to-Analog Glitch Impulse
Digital Feedthrough
DC Output Impedance
Short Circuit Current
V
DD
= +5 V
V
DD
= +3 V
Coming Out of Power-Down Mode. V
DD
= +5V
Coming Out of Power-Down Mode. V
DD
= +3V
Power-Up Time
LOGIC INPUTS
3
Input Current
V
INL
, Input Low Voltage
V
INL
, Input Low Voltage
V
INH
, Input High Voltage
V
INH
, Input High Voltage
Pin Capacitance
±
1
0.8
0.6
μ
A
V
V
V
V
pF
V
DD
= +5 V
V
DD
= +3V
V
DD
= +5 V
V
DD
= +3 V
2.4
2.1
3
POWER REQUIREMENTS
V
DD
I
DD
(Normal Mode)
V
DD
= +4.5 V to +5.5 V
V
DD
= +2.7 V to +3.6 V
I
DD
(All Power-Down Modes)
V
DD
= +4.5 V to +5.5 V
V
DD
= +2.7 V to +3.6 V
2.7
5.5
V
DAC Active and Excluding Load Current
V
IH
= V
DD
and V
IL
= GND
V
IH
= V
DD
and V
IL
= GND
140
115
250
200
μ
A
μ
A
0.2
0.05
1
1
μ
A
μ
A
V
IH
= V
DD
and V
IL
= GND
V
IH
= V
DD
and V
IL
= GND
POWER EFFICIENCY
I
OUT
/I
DD
93
%
I
LOAD
= 2 mA. V
DD
= +5 V
NOTES
1
Temperature ranges are as follows: B Version: –40
°
C to +105
°
C.
2
Linearity
calculated using a reduced code range of 4 to 251. Output unloaded.
3
Guaranteed by design and characterization, not production tested.
Specifications subject to change without notice.
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