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參數(shù)資料
型號: AD5293BRUZ-100
廠商: Analog Devices Inc
文件頁數(shù): 21/24頁
文件大?。?/td> 0K
描述: IC DGTL POT 1024POS 100K 14TSSOP
標(biāo)準(zhǔn)包裝: 96
接片: 1024
電阻(歐姆): 100k
電路數(shù): 1
溫度系數(shù): 標(biāo)準(zhǔn)值 35 ppm/°C
存儲器類型: 易失
接口: 4 線串行
電源電壓: 9 V ~ 33 V,±9 V ~ 16.5 V
工作溫度: -40°C ~ 105°C
安裝類型: 表面貼裝
封裝/外殼: 14-TSSOP(0.173",4.40mm 寬)
供應(yīng)商設(shè)備封裝: 14-TSSOP
包裝: 管件
產(chǎn)品目錄頁面: 787 (CN2011-ZH PDF)
AD5293
Rev. D | Page 6 of 24
Parameter
Symbol
Conditions
Min
Max
Unit
DYNAMIC CHARACTERISTICS4, 8
Bandwidth
BW
3 dB
kHz
RAB = 50 kΩ
210
RAB = 100 kΩ
105
Total Harmonic Distortion
THDW
VA = 1 V rms, VB = 0 V, f = 1 kHz
RAB = 50 kΩ
101
dB
RAB = 100 kΩ
106
dB
VW Settling Time
tS
VA = 30 V, VB = 0 V, ±0.5 LSB error
band, initial code = zero scale
Code = full scale, R-normal mode
750
ns
Code = full scale, R-perf mode
2.5
μs
Code = half scale, R-normal mode,
RAB = 50 kΩ
7
μs
Code = half scale, R-normal mode,
RAB = 100 kΩ
14
μs
Code = half scale, R-perf mode,
RAB = 50 kΩ
9
μs
Code = half scale, R-perf mode,
RAB = 100 kΩ
16
μs
Resistor Noise Density
eN_WB
Code = half scale, TA = 25°C,
0 kHz to 200 kHz,
RAB = 50 kΩ
18
nV/√Hz
RAB = 100 kΩ
27
nV/√Hz
1 Typicals represent average readings at 25°C; VDD = +15 V, VSS = 15 V, and VLOGIC = 5 V.
2 Resistor position nonlinearity error. R-INL is the deviation from an ideal value measured between RWB at Code 0x00B to Code 0x3FF or between RWA at Code 0x3F3 to
Code 0x000. R-DNL measures the relative step change from ideal between successive tap positions. The specification is guaranteed in resistor performance mode with
a wiper current of 1 mA for VA < 12 V and 1.2 mA for VA ≥ 12 V.
3 The terms resistor performance mode and R-perf mode are used interchangeably.
4 Guaranteed by design; not subject to production test.
5 INL and DNL are measured at VW with the RDAC configured as a potentiometer divider similar to a voltage output DAC. VA = VDD and VB = 0 V. DNL specification limits
of ±1 LSB maximum are guaranteed monotonic operating conditions.
6 The A, B, and W resistor terminals have no limitations on polarity with respect to each other. Dual-supply operation enables ground-referenced bipolar signal
adjustment.
7 PDISS is calculated from (IDD × VDD) + (ISS × VSS) + (ILOGIC × VLOGIC).
8 All dynamic characteristics use VDD = +15 V, VSS = 15 V, and VLOGIC = 5 V.
RESISTOR PERFORMANCE MODE CODE RANGE—50 kΩ AND 100 kΩ VERSIONS
Table 4.
RAB = 50 kΩ
RAB = 100 kΩ
|VDD VSS| = 26 V to 33 V
|VDD VSS| = 21 V to 26 V
|VDD VSS| = 26 V to 33 V
|VDD VSS| = 21 V to 26 V
Resistor Tolerance
per Code
RWB
RWA
RWB
RWA
RWB
RWA
RWB
RWA
1% R-Tolerance
From 0x08C
to 0x3FF
From 0x000
to 0x35F
From 0x0B4
to 0x3FF
From 0x000
to 0x31E
From 0x04B
to 0x3FF
From 0x000
to 0x3B4
From 0x064
to 0x3FF
From 0x000
to 0x39B
2% R-Tolerance
From 0X03C
to 0x3FF
From 0x000
to 0x3C3
From 0x050
to 0x3FF
From 0x000
to 0x3AF
From 0x028
to 0x3FF
From 0x000
to 0x3D7
From 0x028
to 0x3FF
From 0x000
to 0x3D7
3% R-Tolerance
From 0X028
to 0x3FF
From 0x000
to 0x3D7
From 0x032
to 0x3FF
From 0x000
to 0x3CD
From 0x019
to 0x3FF
From 0x000
to 0x3E6
From 0x019
to 0x3FF
From 0x000
to 0x3E6
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