參數(shù)資料
型號: AD5290YRMZ10
廠商: ANALOG DEVICES INC
元件分類: 數(shù)字電位計
英文描述: Compact +30V/【15V 256-Position Digital Potentiometer
中文描述: 10K DIGITAL POTENTIOMETER, 3-WIRE SERIAL CONTROL INTERFACE, 256 POSITIONS, PDSO10
封裝: ROHS COMPLIANT, MO-187BA, MSOP-10
文件頁數(shù): 10/11頁
文件大小: 150K
代理商: AD5290YRMZ10
Preliminary Technical Data
AD5290
V
A/B/W
. The relative order of
powering V
A
, V
B
, V
W
, and the
digital inputs is not important as long as they are powered after
V
DD
and V
SS
with respect to GND.
Rev. Pr C | Page 10 of 11
LAYOUT AND POWER SUPPLY BYPASSING
It is a good practice to employ compact, minimum lead length
layout design. The leads to the inputs should be as direct as
possible with a minimum conductor length. Ground paths
should have low resistance and low inductance.
Similarly, it is also a good practice to bypass the power supplies
with quality capacitors for optimum stability. Supply leads to
the device should be bypassed with disc or chip ceramic
capacitors of 0.01 μF to 0.1 μF. Low ESR 1 μF to 10 μF tantalum
or electrolytic capacitors should also be applied at the supplies
to minimize any transient disturbance and low frequency ripple
(see Figure 4). Note that the digital ground should also be
joined remotely to the analog ground at one point to minimize
the ground bounce.
Figure 4. Power Supply Bypassing
DAISY CHAIN OPERATION
The serial data output pin (SDO) can be used to daisy chain
multiple devices for simultaneous operations, see Figure 12. The
SDO pin contains an open drain N-Ch FET and requires a pull-
up resistor. Users need to tie the SDO pin of one package to the
SDI pin of the next package. If many devices are daisy-chained,
users may need to increase the clock period to accommodate
the time delay introduced by the pull-up resistors and the
capacitive loading at the SDO-SDI interface, see Figure 12.
If two AD5290 are daisy chained, this requires total 16 bits of
data. The first 8 bits goes to U2 and the second 8 bits goes to
U1. The CS should be kept low until all 16 bits are clocked into
their respective serial registers. The CS is then pulled high to
complete the operation.
Figure 12. Daisy Chain Configuration
AD5290
U1
SDI
S
D
O
CS
CLK
AD5290
U2
S
D
I
SDO
CS
CLK
2
.
2
K
R
p
V
D
D
SCLK
MOSI
SS
m
uC
AD5290
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相關代理商/技術參數(shù)
參數(shù)描述
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