參數(shù)資料
型號： AD1380JD
廠商： ANALOG DEVICES INC
元件分類： ADC
英文描述： Low Cost 16-Bit Sampling ADC
中文描述： 2-CH 16-BIT SUCCESSIVE APPROXIMATION ADC, PARALLEL ACCESS, CDIP32
封裝： HERMETIC SEALED, BOTTOM BRAZED, CERAMIC, DIP-32
文件頁數(shù)： 2/8頁
文件大?。?/td> 240K
代理商： AD1380JD
–2–
REV. B
AD1380–SPECIFICATIONS
Model
AD1380JD
AD1380KD
Units
RESOLUTION
16
*
Bits
ANALOG INPUTS
Bipolar
Unipolar
±
2.5,
±
5,
±
10
0 to +5, 0 to +10
*
*
Volts
Volts
DIGITAL INPUTS
1
Convert Command
TTL Compatible
Trailing Edge of Positive
50 ns (min) Pulse
1
*
Logic Loading
*
LSTTL Load
TRANSFER CHARACTERISTICS
2
(COMBINED ADC/SHA)
Gain Error
Unipolar Offset Error
Bipolar Zero Error
Linearity Error
Differential Linearity Error
Noise (10 V Unipolar)
(20 V Bipolar)
±
0.1 max,
±
0.05 typ
3
±
0.05 max,
±
0.02 typ
3
±
0.05 max,
±
0.02 typ
3
±
0.006
±
0.003
85
115
*
*
*
±
0.003
*
*
*
% FSR
4
% FSR
% FSR
% FSR
% FSR
μ
V rms
μ
V rms
THROUGHPUT
Conversion Time
Acquisition Time (20 V Step)
14 max
6 max
*
*
μ
s
μ
s
SAMPLE & HOLD
Input Resistance
Small Signal Bandwidth
Aperture Time
Aperture Jitter
Droop Rate
T
MIN
to T
MAX
Feedthrough
4
900
50
100
50
1
–80
*
*
*
*
*
*
*
k
kHz
ns
ps rms
μ
V/ms
mV/ms
dB
DRIFT (ADC & SHA)
5
Gain
Unipolar Offset
Bipolar Zero
No Missing Codes (Guaranteed)
±
20 max
±
5 max (
±
2 typ)
±
5 max (
±
2 typ)
0 to +70 (13 Bits)
*
*
*
0 to +70 (14 Bits)
ppm/
°
C
ppm/
°
C
ppm/
°
C
°
C
DIGITAL OUTPUTS
All Codes Complementary
Clock Frequency
TTL Compatible
5
1.1
*
*
LSTTL Loads
MHz
POWER SUPPLY REQUIREMENTS
Analog Supplies
Digital Supply
+15 V Supply Current
–15 V Supply Current
+5 V Supply Current
Power Dissipation
±
15
±
0.5
+5
±
0.25
25
30
15
900
*
*
*
*
*
*
Volts
Volts
mA
mA
mA
mW
TEMPERATURE RANGE
Specified
Operating
0 to +70
–25 to +85
*
*
°
C
°
C
NOTES
1
Logic “0” = 0.8 V, max. Logic “1” = 2.0 V, min for inputs. For digital outputs Logic “0” = 0.4 V max. Logic “1” = 2.4 V min.
2
Tested on
±
10 V and 0 V to +10 V ranges.
3
Adjustable to zero.
4
Full-scale range.
5
Guaranteed but not 100% production tested.
*Specifications same as AD1380JD.
Specifications subject to change without notice.
(typical @ T
A
= +25
8
C, V
S
= +15 V, +5 V combined sample-and-hold A/D converter
unless otherwise noted)
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