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參數(shù)資料
| 型號(hào)： | ACH16841DGG |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 通用總線功能 |
| 英文描述： | Circular Connector; MIL SPEC:MIL-DTL-38999 Series II; Body Material:Metal; Series:JT; No. of Contacts:5; Connector Shell Size:10; Connecting Termination:Crimp; Circular Shell Style:Straight Plug; Body Style:Straight RoHS Compliant: No |
| 中文描述： | ALVC/VCX/A SERIES, DUAL 10-BIT DRIVER, TRUE OUTPUT, PDSO56 |
| 文件頁(yè)數(shù)： | 7/10頁(yè) |
| 文件大?。?/td> | 77K |
| 代理商： | ACH16841DGG |
Philips Semiconductors
Product specification
74ALVCH16841
20-bit bus interface D-type latch (3-State)
1998 Jul 27
7
AC WAVEFORMS FOR V
CC
= 2.3V TO 2.7V AND
V
CC
< 2.3V RANGE
V
M
= 0.5 V
V
X
= V
OL
+ 0.15V
V
Y
= V
OH
–0.15V
V
OL
and V
OH
are the typical output voltage drop that occur with the
output load.
AC WAVEFORMS FOR V
CC
= 3.0V TO 3.6V AND
V
CC
= 2.7V RANGE
V
M
= 1.5 V
V
X
= V
OL
+ 0.3V
V
Y
= V
–0.3V
V
and V
OH
are the typical output voltage drop that occur with the
output load.
VI
= 2.7V
VI
= V
CC
D
INPUT
t
PHL
t
PLH
V
OL
V
I
GND
V
OH
Q
OUTPUT
V
M
V
M
SH00153
Waveform 1. The input (D
n
) to output (Q
n
) propagation delay
LE INPUT
Qn OUTPUT
V
I
GND
V
OH
V
OL
t
PHL
t
PLH
t
W
V
M
V
M
V
M
SH00150
Waveform 2. The latch enable (LE) pulse width, the latch enable
input to output (Q
n
) propagation delay
ééé
ééé
ééé
GND
éééééééé
éééééééé
éééééééé
Dn
INPUT
LE
INPUT
t
SU
NOTE:
The shaded areas indicate when the input is permitted to change
for predictable output performance.
t
SU
V
V
I
GND
V
V
M
SH00149
Waveform 3. The data set up and hold times for the D
n
input to
the LE input
t
PLZ
t
PZL
V
I
nOE INPUT
GND
V
CC
OUTPUT
LOW-to-OFF
OFF-to-LOW
V
OL
V
OH
OUTPUT
HIGH-to-OFF
OFF-to-HIGH
GND
outputs
enabled
outputs
enabled
outputs
disabled
t
PHZ
V
M
V
M
V
M
t
PZH
V
X
V
Y
SH00137
Waveform 4. 3-State enable and disable times
TEST CIRCUIT
SWITCH POSITION
PULSE
GENERATOR
R
T
V
I
D.U.T.
V
O
C
L
V
CC
R
L
= 500
Test Circuit for switching times
Open
GND
S
1
DEFINITIONS
R
L
= Load resistor
C
L
= Load capacitance includes jig and probe capacitance
R
T
= Termination resistance should be equal to Z
OUT
of pulse generators.
V
CC
V
I
< 2.7V
V
CC
TEST
S
1
t
PLH/
t
PHL
Open
2
V
CC
t
PLZ/
t
PZL
2.7V
2.7–3.6V
t
PHZ/
t
PZH
GND
R
L
= 500
2 * V
CC
SV00906
Waveform 5. Load circuitry for switching times
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