參數(shù)資料
型號： ACH16543DGG
廠商： NXP SEMICONDUCTORS
元件分類： 通用總線功能
英文描述： JT 13C 13#22D PIN PLUG
中文描述： ALVC/VCX/A SERIES, DUAL 8-BIT REGISTERED TRANSCEIVER, TRUE OUTPUT, PDSO56
封裝： 6.10 MM, PLASTIC, MO-153EE, SOT-364-1, TSSOP-56
文件頁數(shù)： 10/20頁
文件大小： 89K
代理商： ACH16543DGG
1999 Nov 23
10
Philips Semiconductors
Product specification
16-bit D-type registered transceiver; 3-state
74ALVCH16543
AC CHARACTERISTICS FOR V
CC
= 2.7 V AND V
CC
= 3.0 V TO 3.6 V
Ground = 0 V; t
r
= t
f
≤
2.5 ns; C
L
= 50 pF.
Notes
1.
2.
All typical values are measured at T
amb
= 25
°
C.
Typical values at V
CC
= 3.0 V.
SYMBOL
PARAMETER
TEST CONDITIONS
T
amb
=
40 TO +85
°
C
UNIT
WAVEFORMS
V
CC
(V)
2.7
3.0 to 3.6
2.7
3.0 to 3.6
2.7
3.0 to 3.6
2.7
3.0 to 3.6
2.7
3.0 to 3.6
2.7
3.0 to 3.6
2.7
3.0 to 3.6
2.7
3.0 to 3.6
2.7
3.0 to 3.6
MIN.
TYP.
(1)
MAX.
t
PHL
/t
PLH
propagation delay
nA
n
, nB
n
to nB
n
, nA
n
see Figs 6 and 10
1.0
1.4
1.0
1.0
1.0
1.1
3.3
3.3
0.8
1.3
0.4
0.7
2.9
3.8
(2)
3.6
3.1
(2)
3.4
2.9
(2)
3.3
3.2
(2)
3.5
3.0
(2)
3.5
3.3
(2)
1.3
0.9
(2)
0.2
0.1
(2)
0.1
0.2
(2)
4.8
4.3
6.2
5.0
6.3
5.3
4.8
4.6
6.9
5.6
6.2
5.1
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
propagation delay
nLE
AB
, nLE
BA
to nB
n
, nA
n
see Figs 7 and 10
t
PZH
/t
PZL
3-state output enable time
nOE
BA
, nOE
AB
to nA
n
, nB
n
see Figs 8 and 10
t
PHZ
/t
PLZ
3-state output disable time
nOE
BA
, nOE
AB
to nA
n
, nB
n
see Figs 8 and 10
t
PZH
/t
PZL
3-state output enable time
nE
BA
, nE
AB
to nA
n
, nB
n
see Figs 8 and 10
t
PHZ
/t
PLZ
3-state output disable time
nE
BA
, nE
AB
to nA
n
, nB
n
see Figs 8 and 10
t
W
nLE
XX
pulse width LOW
see Figs 7 and 10
t
su
set-up time
nA
n
, nB
n
to nLE
XX
, nE
XX
see Figs 9 and 10
t
h
hold time
nA
n
, nB
n
to nLE
XX
, nE
XX
see Figs 9 and 10
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