參數(shù)資料
型號(hào): AAT3236IGV-30-T1
廠商: Advanced Analogic Technologies, Inc.
英文描述: Quadruple 2-Input Positive-AND Gates 14-SOIC 0 to 70
中文描述: 300mA的LDO穩(wěn)壓器的CMOS高性能
文件頁數(shù): 11/16頁
文件大?。?/td> 448K
代理商: AAT3236IGV-30-T1
V
IN
= 4.2 volts
V
OUT
= 3.0 volt
%DC = 100(P
D(MAX)
/((V
IN
-V
OUT
)I
OUT
+(V
IN
xI
GND
))
%DC = 100(526mW/((4.2V-3.0V)500mA+(4.2Vx150μA))
%DC = 87.57%
For a 500mA output current and a 1.2 volt drop
across the AAT3236 at an ambient temperature of
25°C, the maximum on time duty cycle for the
device would be 87.57%.
The following family of curves show the safe oper-
ating area for duty cycled operation from ambient
room temperature to the maximum operating level.
High Peak Output Current Applications
Some applications require the LDO regulator to
operate at a continuous nominal level with short
duration high current peaks. The duty cycles for
both output current levels must be taken into
account. To do so, one would first need to calcu-
late the power dissipation at a nominal continuous
level and then factor in the additional power dissi-
pation due to the short duration high current peaks.
For example, a 3.3V system using a AAT3236IGV-
3.3-T1 operates at a continuous 100mAload current
level and has short 500mA current peaks. The cur-
rent peak occurs for 378μs out of a 4.61ms period.
It will be assumed the input voltage is 4.2V.
AAT3236
300mA CMOS High Performance LDO
3236.2001.11.0.9
11
Device Duty Cycle vs. V
DROP
V
OUT
= 2.5V @ 85 degrees C
0
0.5
1
1.5
2
2.5
3
3.5
0
10
20
30
40
50
60
70
80
90
100
Duty Cycle (%)
V
300 mA
200 mA
100 mA
500 mA
400 mA
Device Duty Cycle vs. V
DROP
V
OUT
= 2.5V @ 50 degrees C
0
0.5
1
1.5
2
2.5
3
3.5
0
10
20
30
40
50
60
70
80
90
100
Duty Cycle (%)
V
500 mA
300 mA
400 mA
100 mA
200 mA
Device Duty Cycle vs. V
DROP
V
OUT
= 2.5V @ 25 degrees C
0
0.5
1
1.5
2
2.5
3
3.5
0
10
20
30
40
50
60
70
80
90
100
Duty Cycle (%)
V
500 mA
400 mA
300 mA
200 mA
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