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參數(shù)資料
| 型號(hào)： | AAT1142IWP-1.8-T1 |
| 廠商： | Advanced Analog Technology,lnc. |
| 英文描述： | 800mA Voltage-Scaling Step-Down Converter |
| 中文描述： | 800mA的電壓縮放降壓轉(zhuǎn)換器 |
| 文件頁數(shù)： | 14/22頁 |
| 文件大?。?/td> | 982K |
| 代理商： | AAT1142IWP-1.8-T1 |
I
2
C Data Bit Map
Figure 5 illustrates the data bit format. The 8-bit
data is always sent with the most significant bit first
and is valid when SCL is high. The ACK bit is set
low by the AAT1142 slave device to acknowledge
receipt of the data.
I
2
C Acknowledge Bit
The ACK bit is the ninth bit in the address and data
byte. The master must first release the SDAline, and
then the slave will pull the SDA line low. The
AAT1142 sends a low bit to acknowledge receipt of
each byte. This occurs during the ninth clock cycle
of Address and Data transfers (see Figures 5 and 6).
I
2
C Software Protocol
An I
2
C master / slave data transfer, detailing the
address and data bits, is shown in Figure 6. The
programming sequence is as follows:
1.
2.
Send a start condition
Send the I
2
C slave address with the R/W bit
set low
Wait for acknowledge within the clock cycle
Send the data bits
Wait for acknowledge within the clock cycle
Send the stop condition
3.
4.
5.
6.
AAT1142
800mA Voltage-Scaling Step-Down Converter
14
1142.2006.07.1.0
Figure 4: I
2
C Address Bit Map;
7-bit Slave Address (A6-A0), 1-bit Read/Write (R/W), 1-bit Acknowledge (ACK).
SCL
1
2
3
4
5
6
7
8
9
SDA
A6
A5
A4
A3
A2
A1
A0
R/W
ACK
Slave Address
LSB
MSB
Figure 5: I
2
C Data Bit Map;
8-bit Data (D7-D0), 1-bit Acknowledge (ACK).
Figure 6: I
2
C SCL, SDA Transfer Protocol Example;
7-bit Slave Address (A6-A0 = 0x14), 1-bit Read/Write (R/W = 0), 1-bit Acknowledge (ACK),
8-bit Data (D7-D0), 1-bit Acknowledge (ACK).
Start
Slave Address
R/W
ACK
Data
ACK Stop
1
SCL
2
3
4
5
6
7
8
9
1
2
3
4
5
6
7
8
9
1
1
0
0
0
0
0
7-bit address (0x14)
0
0/1
0/1
0/1
0/1
0/1
0/1
0/1
0/1
0/1
0/1
SCL
1
2
3
4
5
6
7
8
9
SDA
D7
D6
D5
D4
D3
D2
D1
D0
ACK
Data
LSB
MSB
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