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參數(shù)資料
| 型號(hào)： | A8499SLJTR-T |
| 廠商： | Allegro MicroSystems, Inc. |
| 英文描述： | High Voltage Step-Down Regulator |
| 中文描述： | 高電壓降壓穩(wěn)壓器 |
| 文件頁數(shù)： | 4/7頁 |
| 文件大?。?/td> | 276K |
| 代理商： | A8499SLJTR-T |
A8499-DS
Allegro MicroSystems, Inc.
115 Northeast Cutoff, Box 15036
Worcester, Massachusetts 01615-0036 (508) 853-5000
www.allegromicro.com
A8499
High Voltage Step-Down Regulator
4
Functional Description
The A8499 is a fixed off-time, current-mode–controlled buck
switching regulator. The regulator requires an external clamping
diode, inductor, and filter capacitor, and operates in both continu-
ous and discontinuous modes. An internal blanking circuit is used
to filter out transients resulting from the reverse recovery of the
external clamp diode. Typical blanking time is 200 ns.
The value of a resistor between the TSET pin and ground deter-
mines the fixed off-time (see graph in the t
off
section).
V
OUT
.
The output voltage is adjustable from 1.2 to 24 V, based on
the combination of the value of the external resistor divider and
the internal 1.2 V ±3% reference. The voltage can be calculated
with the following formula:
V
OUT
=
V
FB
× (1 + R1/R2)
Light Load Regulation.
To maintain voltage regulation during
light load conditions, the switching regulator enters a cycle-skip-
ping mode. As the output current decreases, there remains some
energy that is stored during the power switch minimum on-time.
In order to prevent the output voltage from rising, the regulator
skips cycles once it reaches the minimum on-time, effectively
making the off-time larger.
(1)
Soft Start.
An internal ramp generator and counter allow the out-
put to slowly ramp up. This limits the maximum demand on the
external power supply by controlling the inrush current required
to charge the external capacitor and any dc load at startup.
Internally, the ramp is set to 10 ms nominal rise time. During soft
start, current limit is 2.2 A minimum.
The following conditions are required to trigger a soft start:
V
IN
> 6 V
ENB pin input falling edge
Reset of a TSD (thermal shut down) event
V
BIAS
.
To improve overall system efficiency, the regulator output,
V
OUT
, is connected to the VBIAS input to supply the operating
bias current during normal operating conditions. During start up
the circuitry is run off of the VIN supply. VBIAS should be con-
nected to VOUT when the V
OUT
target level is between 3.3 and
5 V. If the output voltage is less than 3.3 V, then the A8499 can
operate with an internal supply and pay a penalty in efficiency,
as the bias current will come from the high voltage supply, VIN.
VBIAS can also be supplied with an external voltage source. No
power-up sequencing is required for normal opperation.
ON/OFF Control.
The ENB pin is externally pulled to ground
to enable the device and begin the soft start sequence. When the
ENB is open circuited, the switcher is disabled and the output
decays to 0 V.
Protection.
The buck switch will be disabled under one or more
of the following fault conditions:
V
IN
< 6 V
ENB pin = open circuit
TSD fault
When the device comes out of a TSD fault, it will go into a soft
start to limit inrush current.
t
OFF
.
The value of a resistor between the TSET pin and ground
determines the fixed off-time. The formula to calculate t
OFF
(
μ
s)
is:
TSET
=
t
OFF
1.2 10
10
R
,
(2)
where R
TSET
(k
Ω
) is the value of the resistor. Results are shown
in the following graph:
t
ON
.
From the volt-second balance of the inductor, the turn-on
time, t
ON
, can be calculated approximately by the equation:
=
t
ON
(
V
OUT
+
V
f
+
I
OUT
R
L
)
t
OFF
V
IN
–
I
OUT
R
DS(on)
–
I
OUT
R
L
–
V
OUT
(3)
where
V
f
is the voltage drop across the external Schottky diode,
R
L
is the winding resistance of the inductor, and
R
DS(on)
is the on-resistance of the switching MOSFET.
Resistance vs. Off-Time
1
3
5
7
9
11
13
15
17
12
36
60
84
108
132
156
180
R
TSET
(k
Ω
)
t
O
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