- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄375155 > A6801 (Allegro MicroSystems, Inc.) DABiC-5 Latched Sink Drivers PDF資料下載
參數(shù)資料
| 型號： | A6801 |
| 廠商： | Allegro MicroSystems, Inc. |
| 英文描述： | DABiC-5 Latched Sink Drivers |
| 中文描述： | 達(dá)比奇- 5鎖存灌電流驅(qū)動器 |
| 文件頁數(shù)： | 4/12頁 |
| 文件大小： | 436K |
| 代理商： | A6801 |
4
Worcester, Massachusetts 01615-0036 (508) 853-5000
115 Northeast Cutoff, Box 15036
www.allegromicro.com
A6800/A6801
DABiC-5 Latched Sink Drivers
D
2
Timing Requirements and Speci
fi
cations
(Logic Levels are V
DD
and Ground)
NOTE: Information present at an input is transferred
to its latch when the STROBE is high. A high CLEAR
input will set all latches to the output off condition
regardless of the data or STROBE input levels. A high
Key
A
B
C
D
E
F
G
H
I
Description
Time (ns)
25
25
50
500
500
500
500
50
100
Minimum data active time before Strobe enabled (Data Set-Up Time)
Minimum data active time after Strobe disabled (Data Hold Time)
Minimum Strobe pulse width
Maximum time between Strobe activation and transition from output on to output off*
Minimum time between Strobe activation and transition from output off to output on*
Maximum time between Output Enable activation and transition from output on to output off*
Minimum time between Output Enable activation and transition from output off to output on*
Minimum Clear pulse width
Minimum data pulse width
CLEAR
STROBE
OUTPUT
ENABLE
INN
OUTN
A
C
B
C
B
G
D
E
H
A
C
B
I
E
G
F
*Conditions for output transition testing are: V
DD
= 50 V, V
CC
= 5 V, R1 = 500
, C1
≤
30 pF.
OUTPUT ENABLE will set all outputs to the off con-
tdition, regardless of any other input conditions. When
the OUTPUT ENABLE is low, the outputs depend on
the state of their respective latches.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| A6801SA | DABiC-5 Latched Sink Drivers |
| A6801SA-T | DABiC-5 Latched Sink Drivers |
| A6801SEP | DABiC-5 Latched Sink Drivers |
| A6801SLW | DABiC-5 Latched Sink Drivers |
| A6801SLW-T | DABiC-5 Latched Sink Drivers |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| A6801_09 | 制造商:ALLEGRO 制造商全稱:Allegro MicroSystems 功能描述:DABiC-5 Latched Sink Drivers |
| A68011-000 | 功能描述:可復(fù)位保險絲 RoHS:否 制造商:TE Connectivity / Raychem 電流額定值: 電阻:0.08 Ohms (max) 最大直流電壓: 保持電流:2.5 A 安裝風(fēng)格:Through Hole 端接類型: 跳閘電流:5 A 引線間隔: 系列:RXEF 工作溫度范圍:+ 85 C |
| A68014-000 | 制造商:TE Connectivity 功能描述:55/2322-20-2/6-9CS2528 - Bulk |
| A68015C0GL5 | 制造商:VISHAY 制造商全稱:Vishay Siliconix 功能描述:Axial Leaded Multilayer Ceramic Capacitors for General Purpose Class 1, Class 2 and Class 3, 50 VDC, 100 VDC, 200 VDC, 500 VDC |
| A6801NL | 制造商:Pulse Electronics Corporation 功能描述: |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。