鍨嬭櫉(h脿o)锛� | A54SX08-FG144I |
寤犲晢锛� | Microsemi SoC |
鏂囦欢闋�(y猫)鏁�(sh霉)锛� | 9/64闋�(y猫) |
鏂囦欢澶у皬锛� | 0K |
鎻忚堪锛� | IC FPGA SX 12K GATES 144-FBGA |
妯�(bi膩o)婧�(zh菙n)鍖呰锛� | 160 |
绯诲垪锛� | SX |
LAB/CLB鏁�(sh霉)锛� | 768 |
杓稿叆/杓稿嚭鏁�(sh霉)锛� | 111 |
闁€鏁�(sh霉)锛� | 12000 |
闆绘簮闆诲锛� | 3 V ~ 3.6 V锛�4.75 V ~ 5.25 V |
瀹夎椤炲瀷锛� | 琛ㄩ潰璨艰 |
宸ヤ綔婧害锛� | -40°C ~ 85°C |
灏佽/澶栨锛� | 144-LBGA |
渚涙噳(y墨ng)鍟嗚ō(sh猫)鍌欏皝瑁濓細 | 144-FPBGA锛�13x13锛� |
鐩搁棞(gu膩n)PDF璩囨枡 |
PDF鎻忚堪 |
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RMA50DRST-S288 | CONN EDGECARD 100POS .125 EXTEND |
HCC65DRYN-S734 | CONN EDGECARD 130PS DIP .100 SLD |
HCC65DRYH-S734 | CONN EDGECARD 130PS DIP .100 SLD |
5745652-3 | CONN BACKSHELL DB15 90DEG METAL |
HSC49DRYS | CONN EDGECARD 98POS DIP .100 SLD |
鐩搁棞(gu膩n)浠g悊鍟�/鎶€琛�(sh霉)鍙冩暩(sh霉) |
鍙冩暩(sh霉)鎻忚堪 |
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A54SX08-FG208 | 鍒堕€犲晢:鏈煡寤犲 鍒堕€犲晢鍏ㄧū:鏈煡寤犲 鍔熻兘鎻忚堪:54SX Family FPGAs |
A54SX08-FG208I | 鍒堕€犲晢:鏈煡寤犲 鍒堕€犲晢鍏ㄧū:鏈煡寤犲 鍔熻兘鎻忚堪:54SX Family FPGAs |
A54SX08-FG208M | 鍒堕€犲晢:鏈煡寤犲 鍒堕€犲晢鍏ㄧū:鏈煡寤犲 鍔熻兘鎻忚堪:54SX Family FPGAs |
A54SX08-FG208PP | 鍒堕€犲晢:鏈煡寤犲 鍒堕€犲晢鍏ㄧū:鏈煡寤犲 鍔熻兘鎻忚堪:54SX Family FPGAs |
A54SX08-FGG144 | 鍔熻兘鎻忚堪:IC FPGA SX 12K GATES 144-FBGA RoHS:鏄� 椤炲垾:闆嗘垚闆昏矾 (IC) >> 宓屽叆寮� - FPGA锛堢従(xi脿n)鍫�(ch菐ng)鍙法绋嬮杸闄e垪锛� 绯诲垪:SX 妯�(bi膩o)婧�(zh菙n)鍖呰:40 绯诲垪:SX-A LAB/CLB鏁�(sh霉):6036 閭忚集鍏冧欢/鍠厓鏁�(sh霉):- RAM 浣嶇附瑷�(j矛):- 杓稿叆/杓稿嚭鏁�(sh霉):360 闁€鏁�(sh霉):108000 闆绘簮闆诲:2.25 V ~ 5.25 V 瀹夎椤炲瀷:琛ㄩ潰璨艰 宸ヤ綔婧害:0°C ~ 70°C 灏佽/澶栨:484-BGA 渚涙噳(y墨ng)鍟嗚ō(sh猫)鍌欏皝瑁�:484-FPBGA锛�27X27锛� |