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| 型號(hào)： | A49LF040TX-33F |
| 廠商： | AMIC Technology Corporation |
| 英文描述： | 240 x 128 pixel format, LED or EL Backlight |
| 中文描述： | 4兆位的CMOS 3.3Volt只低引腳數(shù)快閃記憶體 |
| 文件頁(yè)數(shù)： | 20/31頁(yè) |
| 文件大?。?/td> | 570K |
| 代理商： | A49LF040TX-33F |
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A/A MUX MODE AC CHARACTERISTICS
A49LF040
PRELIMINARY (August, 2004, Version 0.1)
19
AMIC Technology, Corp.
Table 20: Read Cycle Timing Parameters V
DD
=3.0-3.6V
Symbol
T
RC
T
RST
T
AS
T
AH
T
AA
T
OE
T
OLZ
T
OHZ
T
OH
Table 21: Program/Erase Cycle Timing Parameters, V
DD
=3.0-3.6V
Parameter
Min
Max
Units
Read Cycle Time
RST# High to Row Address Setup
R/C# Address Set-up Time
R/C# Address Hold Time
Address Access Time
Output Enable Access Time
OE# Low to Active Output
OE# High to High-Z Output
Output Hold from Address Change
270
1
45
45
0
0
ns
μ
s
ns
ns
ns
ns
ns
ns
ns
120
60
35
Symbol
Parameter
Min
Max
Units
T
RST
T
AS
T
AH
T
CWH
T
OES
T
OEH
T
OEP
T
OET
T
WP
T
WPH
T
DS
T
DH
T
IDA
T
BP
T
BE
T
SCE
Table 22: Reset Timing Parameters, V
DD
=3.0-3.6V
RST# High to Row Address Setup
R/C# Address Setup Time
R/C# Address Hold Time
R/C# to Write Enable High Time
OE# High Setup Time
OE# High Hold Time
OE# to Data# Polling Delay
OE# to Toggle Bit Delay
WE# Pulse Width
WE# Pulse Width High
Data Setup Time
Data Hold Time
Product ID Access and Exit Time
Byte Programming Time
Block Erase Time
Chip Erase Time
1
50
50
50
20
20
100
100
50
5
μ
s
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
μ
s
s
s
40
40
150
300
8
10
Symbol
Parameter
Min
Max
Units
T
PRST
T
RSTP
T
RSTF
T
RST
T
RSTE
V
DD
Stable to Reset Low
RST# Pulse Width
RST# Low to Output Float
RST# High to LFRAME# Low
RST# Low to Reset During Erase or Program
1
ms
ns
ns
μ
s
μ
s
100
1
48
10
(1)
1. There will be a reset latency of TRSTE if a reset procedure is performed during a Program or Erase operation.
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