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參數(shù)資料
| 型號： | A42U0616V-80 |
| 廠商： | AMIC Technology Corporation |
| 英文描述： | 1M X 16 CMOS DYNAMIC RAM WITH EDO PAGE MODE |
| 中文描述： | 100萬× 16的CMOS動態(tài)RAM與江戶頁面模式 |
| 文件頁數(shù)： | 8/25頁 |
| 文件大?。?/td> | 278K |
| 代理商： | A42U0616V-80 |
A42U0616 Series
PRELIMINARY (June, 2001, Version 0.0)
7
AMIC Technology, Inc.
AC Characteristics
(continued)
(VCC = 2.5V
±
10%, VSS = 0V, Ta = 0
°
C to +70
°
C)
Test Conditions:
Input timing reference level: V
IH
/V
IL
=1.8V/0.8V
Output reference level: V
OH
/V
OL
=1.6V/0.8V
Output Load: 1TTL gate + CL (100pF)
Assumed t
T
=2ns
-50
-60
-80
#
Std
Symbol
Parameter
Min.
Max.
Min.
Max.
Min.
Max.
Unit
Notes
20
t
RAL
Column Address to
RAS
Lead Time
25
-
30
-
40
-
ns
21
t
COH
Output Hold After
CAS
Low
5
-
5
-
3
-
ns
22
t
ODS
Output Disable Setup Time
0
-
0
-
0
-
ns
23
t
OFF
Output Buffer Turn-Off Delay Time
0
13
0
15
0
20
ns
8, 10
24
t
ASC
Column Address Setup Time
0
-
0
-
0
-
ns
25
t
CAH
Column Address Hold Time
7
-
10
-
10
-
ns
26
t
OES
OE
Low to
CAS
High Set Up
5
-
5
-
10
-
ns
27
t
WCS
Write Command Setup Time
0
-
0
-
0
-
ns
11
28
t
WCH
Write Command Hold Time
7
-
10
-
10
-
ns
11
29
t
WCR
Write Command Hold Time to
RAS
44
-
55
-
70
-
ns
30
t
WP
Write Command Pulse Width
7
-
10
-
10
-
ns
31
t
RWL
Write Command to
RAS
Lead Time
13
-
15
-
20
-
ns
32
t
CWL
Write Command to
CAS
Lead Time
7
-
10
-
10
-
ns
33
t
DS
Data-in setup Time
0
-
0
-
0
-
ns
34
t
DH
Data-in Hold Time
7
-
10
-
15
-
ns
35
t
DHR
Data-in Hold Time to
RAS
44
-
55
-
70
-
ns
36
t
RWC
Read-Modify-Write Cycle Time
110
-
135
-
180
-
ns
37
t
RWD
RAS
to
WE
Delay Time (Read-Modify-
Write)
67
-
79
-
107
-
ns
11
38
t
CWD
CAS
to
WE
Delay Time (Read-Modify-
Write)
30
-
34
-
47
-
ns
11
39
t
AWD
Column Address to
WE
Delay Time
(Read-Modify-Write)
42
-
49
-
67
-
ns
11
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