Revision 13 2-43 Table 2-53 3.3 V LVTTL / 3.3 V LVCMOS Low Slew Commercial-Case Conditions: T" />
鍙冩暩(sh霉)璩囨枡
鍨嬭櫉锛� A3P400-1FG256I
寤犲晢锛� Microsemi SoC
鏂囦欢闋佹暩(sh霉)锛� 174/220闋�
鏂囦欢澶�?銆�?/td> 0K
鎻忚堪锛� IC FPGA 1KB FLASH 400K 256-FBGA
妯�(bi膩o)婧�(zh菙n)鍖呰锛� 90
绯诲垪锛� ProASIC3
RAM 浣嶇附瑷�(j矛)锛� 55296
杓稿叆/杓稿嚭鏁�(sh霉)锛� 178
闁€鏁�(sh霉)锛� 400000
闆绘簮闆诲锛� 1.425 V ~ 1.575 V
瀹夎椤炲瀷锛� 琛ㄩ潰璨艰
宸ヤ綔婧害锛� -40°C ~ 85°C
灏佽/澶栨锛� 256-LBGA
渚涙噳(y墨ng)鍟嗚ō(sh猫)鍌欏皝瑁濓細 256-FPBGA锛�17x17锛�
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ProASIC3 Flash Family FPGAs
Revision 13
2-43
Table 2-53 3.3 V LVTTL / 3.3 V LVCMOS Low Slew
Commercial-Case Conditions: TJ = 70掳C, Worst-Case VCC = 1.425 V, Worst-Case VCCI = 3.0 V
Applicable to Standard Plus I/O Banks
Drive
Strength
Equiv.
Software
Default
Drive
Strength
Option1
Speed
Grade
tDOUT
tDP
tDIN tPY tEOUT tZL
tZH
tLZ
tHZ
tZLS
tZHS Units
100 A
2 mA
Std.
0.60
14.97 0.04 1.52 0.43 14.97 12.79 3.52 3.41 18.36 16.18
ns
鈥�1
0.51
12.73 0.04 1.29 0.36 12.73 10.88 2.99 2.90 15.62 13.77
ns
鈥�2
0.45
11.18 0.03 1.14 0.32 11.18 9.55 2.63 2.55 13.71 12.08
ns
100 A
4 mA
Std.
0.60
10.36 0.04 1.52 0.43 10.36 8.93 3.99 4.24 13.75 12.33
ns
鈥�1
0.51
8.81 0.04 1.29 0.36
8.81
7.60 3.39 3.60 11.70 10.49
ns
鈥�2
0.45
7.74 0.03 1.14 0.32
7.74
6.67 2.98 3.16 10.27 9.21
ns
100 A
6 mA
Std.
0.60
10.36 0.04 1.52 0.43 10.36 8.93 3.99 4.24 13.75 12.33
ns
鈥�1
0.51
8.81 0.04 1.29 0.36
8.81
7.60 3.39 3.60 11.70 10.49
ns
鈥�2
0.45
7.74 0.03 1.14 0.32
7.74
6.67 2.98 3.16 10.27 9.21
ns
100 A
8 mA
Std.
0.60
7.81 0.04 1.52 0.43
7.81
6.85 4.32 4.76 11.20 10.24
ns
鈥�1
0.51
6.64 0.04 1.29 0.36
6.64
5.82 3.67 4.05 9.53
8.71
ns
鈥�2
0.45
5.83 0.03 1.14 0.32
5.83
5.11 3.22 3.56 8.36
7.65
ns
100 A
16 mA
Std.
0.60
7.81 0.04 1.52 0.43
7.81
6.85 4.32 4.76 11.20 10.24
ns
鈥�1
0.51
6.64 0.04 1.29 0.36
6.64
5.82 3.67 4.05 9.53
8.71
ns
鈥�2
0.45
5.83 0.03 1.14 0.32
5.83
5.11 3.22 3.56 8.36
7.65
ns
Notes:
1. The minimum drive strength for any LVCMOS 3.3 V software configuration when run in wide range is 卤100 A. Drive
strength displayed in the software is supported for normal range only. For a detailed I/V curve, refer to the IBIS models.
2. For specific junction temperature and voltage supply levels, refer to Table 2-6 on page 2-6 for derating values.
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