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參數(shù)資料
| 型號(hào)： | A29DL32X |
| 廠商： | AMIC Technology Corporation |
| 英文描述： | 32 Megabit (4M x 8-Bit/2M x 16-Bit) CMOS 3.0 Volt-only, Simultaneous Operation Flash Memory |
| 中文描述： | 32兆位（4米× 8-Bit/2M x 16位），3.0伏的CMOS只，同時(shí)作業(yè)快閃記憶體 |
| 文件頁數(shù)： | 19/50頁 |
| 文件大?。?/td> | 771K |
| 代理商： | A29DL32X |
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A29DL32x Series
PRELIMINARY (May, 2005, Version 0.0)
18
AMIC Technology, Corp.
Hardware Data Protection
The command sequence requirement of unlock cycles for
programming or erasing provides data protection against
inadvertent writes (refer to Table 12 for command definitions).
In addition, the following hardware data protection measures
prevent accidental erasure or programming, which might
otherwise be caused by spurious system level signals during
VCC power-up and power-down transitions, or from system
noise.
Low VCC Write Inhibit
When VCC is less than V
LKO
, the device does not accept any
write cycles. This protects data during VCC
power-up and
power-down. The command register and all internal
program/erase circuits are disabled, and the device resets to
reading array data. Subsequent writes are ignored until VCC
is greater than V
LKO
. The system must provide the proper
signals to the control pins to prevent unintentional writes
when VCC
is greater than V
LKO
.
Write Pulse “Glitch” Protection
Noise pulses of less than 5ns (typical) on
OE
,
CE
or
WE
do not initiate a write cycle.
Logical Inhibit
Write cycles are inhibited by holding any one of
OE
= V
IL
,
CE
= V
IH
or
WE
= V
IH
. To initiate a write cycle,
CE
and
WE
must be a logical zero while
OE
is a logical one.
Power-Up Write Inhibit
If
WE
=
CE
= V
IL
and
OE
= V
IH
during power up, the
device does not accept commands on the rising edge of
WE
.
The internal state machine is automatically reset to reading
array data on power-up.
COMMON FLASH MEMORY INTERFACE (CFI)
The Common Flash Interface (CFI) specification outlines
device and host system software interrogation handshake,
which allows specific vendor-specified software algorithms to
be used for entire families of devices. Software support can
then be device-independent, JEDEC ID-independent, and
forward- and backward-compatible for the specified flash
device families. Flash vendors can standardize their existing
interfaces for long-term compatibility.
This device enters the CFI Query mode when the system
writes the CFI Query command, 98h, to address 55h in word
mode (or address AAh in byte mode), any time the device is
ready to read array data. The system can read CFI
information at the addresses given in Tables 8-11. To
terminate reading CFI data, the system must write the reset
command.
The system can also write the CFI query command when the
device is in the autoselect mode. The device enters the CFI
query mode, and the system can read CFI data at the
addresses given in Tables 8-11. The system must write the
reset command to return the device to the autoselect mode.
Table 8. CFI Query Identification String
Addresses
(Word Mode)
10h
11h
12h
13h
14h
15h
16h
17h
18h
19h
1Ah
Addresses
(Byte Mode)
20h
22h
24h
26h
28h
2Ah
2Ch
2Eh
30h
32h
34h
Data
Description
0051h
0052h
0059h
0002h
0000h
0040h
0000h
0000h
0000h
0000h
0000h
Query Unique ASCII string “QRY”
Primary OEM Command Set
Address for Primary Extended Table
Alternate OEM Command Set (00h = none exists)
Address for Alternate OEM Extended Table (00h = none exists)
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