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參數(shù)資料
| 型號(hào)： | A1460A-PQG160C |
| 廠商： | Microsemi SoC |
| 文件頁(yè)數(shù)： | 13/90頁(yè) |
| 文件大?。?/td> | 0K |
| 描述： | IC FPGA 6K GATES 160-PQFP |
| 標(biāo)準(zhǔn)包裝： | 24 |
| 系列： | ACT™ 3 |
| LAB/CLB數(shù)： | 848 |
| 輸入/輸出數(shù)： | 131 |
| 門(mén)數(shù)： | 6000 |
| 電源電壓： | 4.5 V ~ 5.5 V |
| 安裝類(lèi)型： | 表面貼裝 |
| 工作溫度： | 0°C ~ 70°C |
| 封裝/外殼： | 160-BQFP |
| 供應(yīng)商設(shè)備封裝： | 160-PQFP（28x28） |
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Detailed Specifications
2- 12
R e visio n 3
Power Dissipation
P = [ICC standby + Iactive] * VCC * IOL * VOL * N + IOH* (VCC – VOH) * M
EQ 3
where:
ICC standby is the current flowing when no inputs or outputs are changing
Iactive is the current flowing due to CMOS switching.
IOL and IOH are TTL sink/source current.
VOL and VOH are TTL level output voltages.
N is the number of outputs driving TTL loads to VOL.
M equals the number of outputs driving TTL loads to VOH.
An accurate determination of N and M is problematical because their values depend on the design and
on the system I/O. The power can be divided into two components: static and active.
Static Power Component
Microsemi FPGAs have small static power components that result in lower power dissipation than PALs
or PLDs. By integrating multiple PALs/PLDs into one FPGA, an even greater reduction in board-level
power dissipation can be achieved.
The power due to standby current is typically a small component of the overall power. Standby power is
calculated in Table 2-9 for commercial, worst case conditions.
The static power dissipated by TTL loads depends on the number of outputs driving high or low and the
DC load current. Again, this value is typically small. For instance, a 32-bit bus sinking 4 mA at 0.33 V will
generate 42 mW with all outputs driving low, and 140 mW with all outputs driving high. The actual
dissipation will average somewhere between as I/Os switch states with time.
Active Power Component
Power dissipation in CMOS devices is usually dominated by the active (dynamic) power dissipation. This
component is frequency dependent, a function of the logic and the external I/O. Active power dissipation
results from charging internal chip capacitances of the interconnect, unprogrammed antifuses, module
inputs, and module outputs, plus external capacitance due to PC board traces and load device inputs.
An additional component of the active power dissipation is the totem-pole current in CMOS transistor
pairs. The net effect can be associated with an equivalent capacitance that can be combined with
frequency and voltage to represent active power dissipation.
Equivalent Capacitance
The power dissipated by a CMOS circuit can be expressed by EQ 4.
Power (W) = CEQ * VCC
2 * F
EQ 4
Where:
CEQ is the equivalent capacitance expressed in pF.
VCC is the power supply in volts.
F is the switching frequency in MHz.
Table 2-9 Standby Power Calculation
ICC
VCC
Power
2 mA
5.25 V
10.5 mW
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| A1460A-PQG160I | 功能描述:IC FPGA 6K GATES 160-PQFP RoHS:是 類(lèi)別:集成電路 (IC) >> 嵌入式 - FPGA（現(xiàn)場(chǎng)可編程門(mén)陣列） 系列:ACT™ 3 標(biāo)準(zhǔn)包裝:1 系列:ProASICPLUS LAB/CLB數(shù):- 邏輯元件/單元數(shù):- RAM 位總計(jì):129024 輸入/輸出數(shù):248 門(mén)數(shù):600000 電源電壓:2.3 V ~ 2.7 V 安裝類(lèi)型:表面貼裝 工作溫度:- 封裝/外殼:352-BFCQFP，帶拉桿 供應(yīng)商設(shè)備封裝:352-CQFP（75x75） |
| A1460A-PQG208C | 功能描述:IC FPGA 6K GATES 208-PQFP RoHS:是 類(lèi)別:集成電路 (IC) >> 嵌入式 - FPGA（現(xiàn)場(chǎng)可編程門(mén)陣列） 系列:ACT™ 3 標(biāo)準(zhǔn)包裝:1 系列:ProASICPLUS LAB/CLB數(shù):- 邏輯元件/單元數(shù):- RAM 位總計(jì):129024 輸入/輸出數(shù):248 門(mén)數(shù):600000 電源電壓:2.3 V ~ 2.7 V 安裝類(lèi)型:表面貼裝 工作溫度:- 封裝/外殼:352-BFCQFP，帶拉桿 供應(yīng)商設(shè)備封裝:352-CQFP（75x75） |
| A1460A-PQG208I | 功能描述:IC FPGA 6K GATES 208-PQFP RoHS:是 類(lèi)別:集成電路 (IC) >> 嵌入式 - FPGA（現(xiàn)場(chǎng)可編程門(mén)陣列） 系列:ACT™ 3 標(biāo)準(zhǔn)包裝:1 系列:ProASICPLUS LAB/CLB數(shù):- 邏輯元件/單元數(shù):- RAM 位總計(jì):129024 輸入/輸出數(shù):248 門(mén)數(shù):600000 電源電壓:2.3 V ~ 2.7 V 安裝類(lèi)型:表面貼裝 工作溫度:- 封裝/外殼:352-BFCQFP，帶拉桿 供應(yīng)商設(shè)備封裝:352-CQFP（75x75） |
| A1460A-STDCQ196B | 制造商:未知廠家 制造商全稱(chēng):未知廠家 功能描述:ASIC |
| A1460A-STDCQ196M | 制造商:未知廠家 制造商全稱(chēng):未知廠家 功能描述:ASIC |
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