參數(shù)資料
型號(hào)： A1425A-STDCQ132C
元件分類： FPGA
英文描述： FPGA, 310 CLBS, 7500 GATES, CQFP132
封裝： CERAMIC, QFP-132
文件頁數(shù)： 54/54頁
文件大?。?/td> 343K
代理商： A1425A-STDCQ132C
RadTolerant FPGAs
v3.1
1-5
output track is dedicated to the output of a particular
module. Long segments are uncommitted and can be
assigned during routing. Each output segment spans
four channels (two above and two below), except near
the top and bottom of the array where edge effects
occur. Long vertical tracks contain either one or two
segments. An example of vertical routing tracks and
segments is shown in Figure 1-5.
Antifuse Structures
An antifuse is a "normally open" structure as opposed to
the normally closed fuse structure used in PROMs
(programmable read-only memory) or PALs (programmed
array logic). The use of antifuses to implement a PLD
(programmable logic device) results in highly testable
structures, as well as efficient programming algorithms.
The structure is highly testable because there are no pre-
existing connections, enabling temporary connections to
be
made
using
pass
transistors.
These
temporary
connections can isolate individual antifuses to be
programmed, and also isolate individual circuit structures
to be tested. This can be done both before and after
programming. For example, all metal tracks can be tested
for continuity and shorts between adjacent tracks, and
the functionality of all logic modules can be verified.
Figure 1-5 Routing Structure
Vertical Routing Tracks
Segmented
Horizontal
Routing
Tracks
Logic
Modules
Antifuses
Table 1-1 Actel MIL-STD-883 Product Flow
Step
Screen
883 Method
883 - Class B
Requirement
1.
Internal Visual
2010, Test Condition B
100%
2.
Temperature Cycling
1010, Test Condition C
100%
3.
Constant Acceleration
2001, Test Condition D or E, Y1, Orientation Only
100%
4.
Seal
a. Fine
b. Gross
1014
100%
5.
Visual Inspection
2009
100%
6.
Pre-Burn-In Electrical Parameters
In accordance with applicable Actel device specification
100%
7.
Burn-in Test
1015, Condition D, 160 hours @ 125°C or 80 hours @ 150°C
100%
8.
Interim (Post-Burn-In) Electrical
Parameters
In accordance with applicable Actel device specification
100%
9.
Percent Defective Allowable
5%
All Lots
10.
Final Electrical Test
a. Static Tests
(1) 25°C (Subgroup 1, Table I)
(2) –55°C and +125°C
(Subgroups 2, 3, Table I)
b. Functional Tests
(1) 25°C (Subgroup 7, Table I)
(2) –55°C and +125°C
(Subgroups 8A and 8B, Table I)
c. Switching Tests at 25°C
(Subgroup 9, Table I)
In accordance with applicable Actel device specification, which
includes a, b, and c:
5005
100%
11.
External Visual
2009
100%
Note: When Destructive Physical Analysis (DPA) is performed on Class B devices, the step coverage requirement as specified in Method
2018 must be waived.
相關(guān)PDF資料
PDF描述
A1425A-STDCQ132M FPGA, 310 CLBS, 7500 GATES, 100 MHz, CQFP132
A14100A-STDCQG256B FPGA, 1377 CLBS, 30000 GATES, 85 MHz, CQFP256
A14100A-STDCQG256M FPGA, 1377 CLBS, 30000 GATES, 85 MHz, CQFP256
A1460A-1PQ160M FPGA, 848 CLBS, 6000 GATES, 125 MHz, PQFP160
A1460A-PQ160M FPGA, 848 CLBS, 6000 GATES, 100 MHz, PQFP160
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
A1425A-STDCQ132M 制造商:未知廠家 制造商全稱:未知廠家 功能描述:ASIC
A1425A-VQ100C 功能描述:IC FPGA 2500 GATES 100-VQFP RoHS:否 類別:集成電路 (IC) >> 嵌入式 - FPGA（現(xiàn)場可編程門陣列） 系列:ACT™ 3 產(chǎn)品變化通告:XC4000(E,L) Discontinuation 01/April/2002 標(biāo)準(zhǔn)包裝:24 系列:XC4000E/X LAB/CLB數(shù):100 邏輯元件/單元數(shù):238 RAM 位總計(jì):3200 輸入/輸出數(shù):80 門數(shù):3000 電源電壓:4.5 V ~ 5.5 V 安裝類型:表面貼裝 工作溫度:-40°C ~ 100°C 封裝/外殼:120-BCBGA 供應(yīng)商設(shè)備封裝:120-CPGA（34.55x34.55）
A1425A-VQ100I 功能描述:IC FPGA 2500 GATES 100-VQFP RoHS:否 類別:集成電路 (IC) >> 嵌入式 - FPGA（現(xiàn)場可編程門陣列） 系列:ACT™ 3 產(chǎn)品變化通告:XC4000(E,L) Discontinuation 01/April/2002 標(biāo)準(zhǔn)包裝:24 系列:XC4000E/X LAB/CLB數(shù):100 邏輯元件/單元數(shù):238 RAM 位總計(jì):3200 輸入/輸出數(shù):80 門數(shù):3000 電源電壓:4.5 V ~ 5.5 V 安裝類型:表面貼裝 工作溫度:-40°C ~ 100°C 封裝/外殼:120-BCBGA 供應(yīng)商設(shè)備封裝:120-CPGA（34.55x34.55）
A1425A-VQG100C 功能描述:IC FPGA 2500 GATES 100-VQFP RoHS:是 類別:集成電路 (IC) >> 嵌入式 - FPGA（現(xiàn)場可編程門陣列） 系列:ACT™ 3 產(chǎn)品變化通告:XC4000(E,L) Discontinuation 01/April/2002 標(biāo)準(zhǔn)包裝:24 系列:XC4000E/X LAB/CLB數(shù):100 邏輯元件/單元數(shù):238 RAM 位總計(jì):3200 輸入/輸出數(shù):80 門數(shù):3000 電源電壓:4.5 V ~ 5.5 V 安裝類型:表面貼裝 工作溫度:-40°C ~ 100°C 封裝/外殼:120-BCBGA 供應(yīng)商設(shè)備封裝:120-CPGA（34.55x34.55）
A1425A-VQG100I 功能描述:IC FPGA 2500 GATES 100-VQFP RoHS:是 類別:集成電路 (IC) >> 嵌入式 - FPGA（現(xiàn)場可編程門陣列） 系列:ACT™ 3 產(chǎn)品變化通告:XC4000(E,L) Discontinuation 01/April/2002 標(biāo)準(zhǔn)包裝:24 系列:XC4000E/X LAB/CLB數(shù):100 邏輯元件/單元數(shù):238 RAM 位總計(jì):3200 輸入/輸出數(shù):80 門數(shù):3000 電源電壓:4.5 V ~ 5.5 V 安裝類型:表面貼裝 工作溫度:-40°C ~ 100°C 封裝/外殼:120-BCBGA 供應(yīng)商設(shè)備封裝:120-CPGA（34.55x34.55）
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