參數(shù)資料
型號: A1280A-1CQG172B
元件分類: FPGA
英文描述: FPGA, 1232 CLBS, 8000 GATES, 60 MHz, CQFP172
封裝: CERAMIC, CQFP-172
文件頁數(shù): 52/54頁
文件大?。?/td> 333K
代理商: A1280A-1CQG172B
RadTolerant FPGAs
v3.1
1-3
The S-module, shown in Figure 1-2, is designed to
implement high-speed sequential functions within a
single logic module. The S-module implements the same
combinatorial logic function as the C-module while
adding a sequential element. The sequential element can
be configured as either a D-type flip-flop or a
transparent latch. To increase flexibility, the S-module
register can be bypassed so it implements purely
combinatorial logic.
Flip-flops can also be created using two C-modules. The
SEU characteristics differ between an S-module flip-flop
and a flip-flop created using two C-modules. For details
see
the
Programmable Gate Arrays application note.
Figure 1-2 S-Module Implementation
D11
D01
D00
D10
Y
OUT
S1
S0
Up to 7-Input Function Plus D-Type Flip-Flop with Clear
D11
D01
D00
D10
Y
S1
S0
Up to 7-Input Function Plus Latch
Y
Up to 4-Input Function Plus Latch with Clear
D11
D01
D00
D10
YOUT
S1
S0
Up to 8-Input Function (Same as C-Module)
S
D1
D0
CLR
DQ
OUT
CLR
DQ
OUT
GATE
DQ
GATE
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