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參數(shù)資料
| 型號： | 9ZX21501CKLFT |
| 廠商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分類： | 時鐘及定時 |
| 英文描述： | 9ZX SERIES, PLL BASED CLOCK DRIVER, 15 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PQCC64 |
| 封裝： | ROHS COMPLIANT, PLASTIC, MLF-64 |
| 文件頁數(shù)： | 11/16頁 |
| 文件大小： | 173K |
| 代理商： | 9ZX21501CKLFT |
IDT
15-Output Differential Zbuffer for PCIe Gen2/3 and QPI
1683A - 08/03/10
9ZX21501C
15-Output Differential Zbuffer for PCIe Gen2/3 and QPI
4
Pin Description (continued)
33
OE6#
IN
Active low input for enabling DIF pair 6.
1 =disable outputs, 0 = enable outputs
34
DIF_7
OUT
0.7V differential true clock output
35
DIF_7#
OUT
0.7V differential Complementary clock output
36
OE7#
IN
Active low input for enabling DIF pair 7.
1 =disable outputs, 0 = enable outputs
37
DIF_8
OUT
0.7V differential true clock output
38
DIF_8#
OUT
0.7V differential Complementary clock output
39
OE8#
IN
Active low input for enabling DIF pair 8.
1 =disable outputs, 0 = enable outputs
40
GND
PWR
Ground pin.
41
VDD
PWR
Power supply, nominal 3.3V
42
NC
N/A
No Connection.
43
DIF_10
OUT
0.7V differential true clock output
44
DIF_10#
OUT
0.7V differential Complementary clock output
45
OE10#
IN
Active low input for enabling DIF pair 10.
1 =disable outputs, 0 = enable outputs
46
DIF_11
OUT
0.7V differential true clock output
47
DIF_11#
OUT
0.7V differential Complementary clock output
48
OE11#
IN
Active low input for enabling DIF pair 11.
1 =disable outputs, 0 = enable outputs
49
DIF_12
OUT
0.7V differential true clock output
50
DIF_12#
OUT
0.7V differential Complementary clock output
51
OE12#
IN
Active low input for enabling DIF pair 12.
1 =disable outputs, 0 = enable outputs
52
VDD
PWR
Power supply, nominal 3.3V
53
DIF_13
OUT
0.7V differential true clock output
54
DIF_13#
OUT
0.7V differential Complementary clock output
55
GND
PWR
Ground pin.
56
DIF_15
OUT
0.7V differential true clock output
57
DIF_15#
OUT
0.7V differential Complementary clock output
58
DIF_16
OUT
0.7V differential true clock output
59
DIF_16#
OUT
0.7V differential Complementary clock output
60
VDD
PWR
Power supply, nominal 3.3V
61
DIF_17
OUT
0.7V differential true clock output
62
DIF_17#
OUT
0.7V differential Complementary clock output
63
VDDA
PWR
3.3V power for the PLL core.
64
GNDA
PWR
Ground pin for the PLL core.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| 9ZX21901B | 制造商:IDT 制造商全稱:Integrated Device Technology 功能描述:19-Output Differential Zbuffer for PCIe Gen2/3 and QPI |
| 9ZX21901BKLF | 功能描述:時鐘緩沖器 HIGH PERF. ZDB DB190 0Z w/External Fdbk RoHS:否 制造商:Texas Instruments 輸出端數(shù)量:5 最大輸入頻率:40 MHz 傳播延遲（最大值）: 電源電壓-最大:3.45 V 電源電壓-最小:2.375 V 最大功率耗散: 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LLP-24 封裝:Reel |
| 9ZX21901BKLFT | 功能描述:時鐘緩沖器 HIGH PERF. ZDB DB190 0Z w/External Fdbk RoHS:否 制造商:Texas Instruments 輸出端數(shù)量:5 最大輸入頻率:40 MHz 傳播延遲（最大值）: 電源電壓-最大:3.45 V 電源電壓-最小:2.375 V 最大功率耗散: 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LLP-24 封裝:Reel |
| 9ZX21901C | 制造商:IDT 制造商全稱:Integrated Device Technology 功能描述:19-Output Differential Zbuffer for PCIe Gen2/3 and QPI |
| 9ZX21901CKLF | 功能描述:時鐘緩沖器 RoHS:否 制造商:Texas Instruments 輸出端數(shù)量:5 最大輸入頻率:40 MHz 傳播延遲（最大值）: 電源電壓-最大:3.45 V 電源電壓-最小:2.375 V 最大功率耗散: 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LLP-24 封裝:Reel |
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