- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄25570 > 9UMS9001AKLFT (INTEGRATED DEVICE TECHNOLOGY INC) 200 MHz, PROC SPECIFIC CLOCK GENERATOR, PQCC56 PDF資料下載
參數(shù)資料
| 型號： | 9UMS9001AKLFT |
| 廠商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分類： | 時鐘產生/分配 |
| 英文描述： | 200 MHz, PROC SPECIFIC CLOCK GENERATOR, PQCC56 |
| 封裝： | ROHS COMPLIANT, PLASTIC, MLF-56 |
| 文件頁數(shù)： | 9/15頁 |
| 文件大小： | 105K |
| 代理商： | 9UMS9001AKLFT |
IDT PC MAIN CLOCK - CK540
1247B—07/19/10
Advance Information
9UMS9001
PC MAIN CLOCK - CK540
3
Pin Description (continued)
PIN #
PIN NAME
TYPE
DESCRIPTION
29
CKLREQ0#
IN
Clock request input for SRC output pair 0. See the SRC, LCD, DOT Power Management Table for
details
30
SRC0C_LPRS
OUT
Complement side of low-power CK505-type SRC0 differential clock. Rs is integrated (No external
series resistor required).
31
SRC0T_LPRS
OUT
True side of low-power CK505-type SRC0 differential clock. Rs is integrated (No external series
resistor required).
32
SRC1C_LPRS
OUT
Complement side of low-power CK505-type SRC1 differential clock. Rs is integrated (No external
series resistor required).
33
SRC1T_LPRS
OUT
True side of low-power CK505-type SRC1 differential clock. Rs is integrated (No external series
resistor required).
34
GNDSRC
PWR Ground for SRC clocks
35
VDDIO_SRC
PWR Power supply for SRC outputs. VDD_IO = 1.05 to 3.3V +/-5%.
36
SRC2C_LPRS
OUT
Complement side of low-power CK505-type SRC2 differential clock. Rs is integrated (No external
series resistor required).
37
SRC2T_LPRS
OUT
True side of low-power CK505-type SRC2 differential clock. Rs is integrated (No external series
resistor required).
38
SRC3C_LPRS
OUT
Complement side of low-power CK505-type SRC3 differential clock. Rs is integrated (No external
series resistor required).
39
SRC3T_LPRS
OUT
True side of low-power CK505-type SRC3 differential clock. Rs is integrated (No external series
resistor required).
40
VDDCORE_3.3
PWR 3.3V Power supply for 3.3V core
41
CLKREQ3#
IN
Clock request input for SRC output pair 2. See the SRC, LCD, DOT Power Management Table for
details
42
CLKREQ2#
IN
Clock request input for SRC output pair 2. See the SRC, LCD, DOT Power Management Table for
details
43
FSLB
IN
Low threshold Frequency Select input. See Table 1: CPU Frequency Select Table and the Vih_fs and
Vil_fs specifications.
44
CPU_STOP#
IN
Stops all CPU clocks except those set to be free running.
45
CPUITPC_LPRS
OUT
Complement side of low-power CK505-type CPUITP differential clock. Rs is integrated (No external
series resistor required). Note that this pin is NOT muxed with an SRC output.
46
CPUITPT_LPRS
OUT
True side of low-power CK505-type CPUITP differential clock. Rs is integrated (No external series
resistor required).
47
CPU1C_LPRS
OUT
Complement side of low-power CK505-type CPU1 differential clock. Rs is integrated (No external
series resistor required). Note that this pin is NOT muxed with an SRC output.
48
CPU1T_LPRS
OUT
True side of low-power CK505-type CPU1 differential clock. Rs is integrated (No external series
resistor required).
49
VDDIO_CPU
PWR Power supply for CPU outputs. VDD_IO = 1.05 to 3.3V +/-5%.
50
GNDCPU
PWR Ground Pin for CPU Outputs
51
CPU0C_LPRS
OUT
Complement side of low-power CK505-type CPU1 differential clock. Rs is integrated (No external
series resistor required). Note that this pin is NOT muxed with an SRC output.
52
CPU0T_LPRS
OUT
True side of low-power CK505-type CPU1 differential clock. Rs is integrated (No external series
resistor required).
53
VDDCPUPLL_3.3
PWR 3.3V Power Supply for CPU PLL.
54
CK_PWRGD#/PD
IN
Notifies 9UMS9001 to sample latched inputs or enter power down mode.
1 = Power down mode
Falling Edge = Sample latched inputs
0 = Normal operation
55
FSLC
IN
Low threshold Frequency Select input. See Table 1: CPU Frequency Select Table and the Vih_fs and
Vil_fs specifications.
56
GNDREF
PWR Ground pin for crystal oscillator circuit and REF output
相關PDF資料 |
PDF描述 |
|---|---|
| 9UMS9001AKLF | 200 MHz, PROC SPECIFIC CLOCK GENERATOR, PQCC56 |
| 9UMS9610CKLFT | 166.67 MHz, PROC SPECIFIC CLOCK GENERATOR, PQCC48 |
| 9UMS9610CKLF | 166.67 MHz, PROC SPECIFIC CLOCK GENERATOR, PQCC48 |
| 9UMS9633BFILFT | 166.67 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO48 |
| 9UMS9633BKILFT | 166.67 MHz, PROC SPECIFIC CLOCK GENERATOR, PQCC48 |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| 9UMS9610BKLF | 制造商:Integrated Device Technology Inc 功能描述:9UMS9610BKLF - Bulk |
| 9UMS9610CKLF | 功能描述:時鐘發(fā)生器及支持產品 RoHS:否 制造商:Silicon Labs 類型:Clock Generators 最大輸入頻率:14.318 MHz 最大輸出頻率:166 MHz 輸出端數(shù)量:16 占空比 - 最大:55 % 工作電源電壓:3.3 V 工作電源電流:1 mA 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:QFN-56 |
| 9UMS9610CKLFT | 功能描述:實時時鐘 RoHS:否 制造商:Microchip Technology 功能:Clock, Calendar. Alarm RTC 總線接口:I2C 日期格式:DW:DM:M:Y 時間格式:HH:MM:SS RTC 存儲容量:64 B 電源電壓-最大:5.5 V 電源電壓-最小:1.8 V 最大工作溫度:+ 85 C 最小工作溫度: 安裝風格:Through Hole 封裝 / 箱體:PDIP-8 封裝:Tube |
| 9UMS9633 | 制造商:IDT 制造商全稱:Integrated Device Technology 功能描述:ULTRA MOBILE PC CLOCK FOR AUTOMOTIVE USE |
| 9UMS9633BFILF | 功能描述:時鐘發(fā)生器及支持產品 RoHS:否 制造商:Silicon Labs 類型:Clock Generators 最大輸入頻率:14.318 MHz 最大輸出頻率:166 MHz 輸出端數(shù)量:16 占空比 - 最大:55 % 工作電源電壓:3.3 V 工作電源電流:1 mA 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:QFN-56 |
發(fā)布緊急采購，3分鐘左右您將得到回復。