參數(shù)資料
型號： 9S12XDP512DGV2
英文描述： Device User Guide for Mask Set L15Y - (Second Silicon - Enhanced Feature Set)
中文描述： 設(shè)備用戶指南掩模組L15Y - （二硅-增強的功能集）
文件頁數(shù)： 44/152頁
文件大?。?/td> 1231K
代理商： 9S12XDP512DGV2
MC9S12XDP512 Device User Guide — 9S12XDP512DGV1/D V01.12
44
$0132
SCI4ACR2
2
Read:
Write:
Read:
Write:
Read:
Write:
Read:
Write:
Read:
Write:
Read:
Write:
0
0
0
0
0
BERRM1 BERRM0
BKDFE
$0133
SCI4CR2
TIE
TCIE
RIE
ILIE
TE
RE
RWU
SBK
$0134
SCI4SR1
TDRE
TC
RDRF
IDLE
OR
NF
FE
PF
$0135
SCI4SR2
AMAP
0
0
TXPOL
RXPOL
BRK13
TXDIR
RAF
$0136
SCI4DRH
R8
T8
0
0
0
0
0
0
$0137
SCI4DRL
R7
T7
R6
T6
R5
T5
R4
T4
R3
T3
R2
T2
R1
T1
R0
T0
NOTES
:
1. Those registers are accessible if the AMAP bit in the SCI4SR2 register is set to zero
2. Those registers are accessible if the AMAP bit in the SCI4SR2 register is set to one
$0138 - $013F
Asynchronous Serial Interface (SCI5) Map
Address
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
$0138
SCI5BDH
1
NOTES
:
1. Those registers are accessible if the AMAP bit in the SCI5SR2 register is set to zero
2. Those registers are accessible if the AMAP bit in the SCI5SR2 register is set to one
Read:
Write:
Read:
Write:
Read:
Write:
Read: RXEDGI
Write:
Read: RXEDGI
Write:
Read:
Write:
Read:
Write:
Read:
Write:
Read:
Write:
Read:
Write:
Read:
Write:
IREN
TNP1
TNP0
SBR12
SBR11
SBR10
SBR9
SBR8
$0139
SCI5BDL
1
SBR7
SBR6
SBR5
SBR4
SBR3
SBR2
SBR1
SBR0
$013A
SCI5CR1
1
LOOPS
SCISWAI
RSRC
M
WAKE
ILT
PE
PT
$0138
SCI5ASR1
2
F
0
0
0
0
BERRV
BERRIF
BKDIF
$0139
SCI5ACR1
2
E
0
0
0
0
0
0
BERRIE
BKDIE
$013A
SCI5ACR2
2
0
0
0
0
BERRM1 BERRM0
BKDFE
$013B
SCI5CR2
TIE
TCIE
RIE
ILIE
TE
RE
RWU
SBK
$013C
SCI5SR1
TDRE
TC
RDRF
IDLE
OR
NF
FE
PF
$013D
SCI5SR2
AMAP
0
0
TXPOL
RXPOL
BRK13
TXDIR
RAF
$013E
SCI5DRH
R8
T8
0
0
0
0
0
0
$013F
SCI5DRL
R7
T7
R6
T6
R5
T5
R4
T4
R3
T3
R2
T2
R1
T1
R0
T0
$00130 - $0137
Asynchronous Serial Interface (SCI4) Map
Address
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
F
For More Information On This Product,
Go to: www.freescale.com
n
.
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