參數(shù)資料
型號: 9S12D32DGV1
英文描述: 9S12DGDJ64DGV1 Device Guide. also covers 9S12D64. 9S12A64. 9S12D32. and 9S12A32 devices
中文描述: 9S12DGDJ64DGV1設備指南。也包括9S12D64。 9S12A64。 9S12D32。和9S12A32設備
文件頁數(shù): 65/126頁
文件大小: 1809K
代理商: 9S12D32DGV1
MC9S12DJ64 Device User Guide — V01.17
65
Section 3 System Clock Description
3.1 Overview
The Clock and Reset Generator provides the internal clock signals for the HCS12 Core and all peripheral
modules.
Figure 3-1
shows the clock connections from the CRG to all modules.
Consult the CRG Block User Guide and OSC Block User Guide for details on clock generation.
Figure 3-1 Clock Connections
CRG
Bus Clock
Core Clock
EXTAL
XTAL
Oscillator Clock
HCS12 CORE
IIC
RAM
SCI0, SCI1
PWM
ATD0, 1
EEPROM
Flash
ECT
BDLC
SPI0
CAN0
PIM
BDM
OSC
CPU
MEBI
MMC
INT
BKP
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相關代理商/技術參數(shù)
參數(shù)描述
9S12DJ64DGV1 制造商:未知廠家 制造商全稱:未知廠家 功能描述:9S12DJ64DG Device Guide. also covers 9S12D64. 9S12A64. 9S12D32 and 9S12A32 devices
9S12DP256BDGV1 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:Automotive applications
9S12DP256BDGV2 制造商:未知廠家 制造商全稱:未知廠家 功能描述:9S12Dx256B Device Guide. also covers C derivatives and 9S12Ax256 devices
9S12DP512DGV1 制造商:未知廠家 制造商全稱:未知廠家 功能描述:9S12Dx512 Device Guide
9S12DT128BDGV1 制造商:未知廠家 制造商全稱:未知廠家 功能描述:9S12DT128B Device Guide