- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄25570 > 9P935AGLFT (INTEGRATED DEVICE TECHNOLOGY INC) 9P SERIES, LOW SKEW CLOCK DRIVER, 6 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO28 PDF資料下載
參數(shù)資料
| 型號： | 9P935AGLFT |
| 廠商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分類： | 時鐘及定時 |
| 英文描述： | 9P SERIES, LOW SKEW CLOCK DRIVER, 6 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO28 |
| 封裝： | 4.40 MM, 0.65 MM PITCH, ROHS COMPLIANT, MO-153, TSSOP-28 |
| 文件頁數(shù)： | 12/13頁 |
| 文件大?。?/td> | 191K |
| 代理商： | 9P935AGLFT |
IDTTM/ICSTM
DDR I/DDR II Phase Lock Loop Zero Delay Buffer
ICS9P935
REV H
12/1/08
ICS9P935
DDR I/DDR II Phase Lock Loop Zero Delay Buffer
8
Timing Requirements
Switching Characteristics
3
Notes:
1.
Refers to transition on noninverting output in PLL bypass mode.
2.
While the pulse skew is almost constant over frequency, the duty cycle error increases at
higher frequencies. This is due to the formula: duty cycle=twH/tc, were the cycle (tc)
decreases as the frequency goes up.
3.
Switching characteristics guaranteed for application frequency range.
4.
Static phase offset shifted by design.
TA = 0 - =70°C; Supply Voltage AVDD, VDD = 2.5 V +/- 0.2V (unless otherwise stated)
PARAMETER
SYMBOL
CONDITIONS
MIN
MAX
UNITS
Max clock frequency
freqop
2.5V+0.2V @ 25
oC
45
600
MHz
Application Frequency
Range
freqApp
2.5V+0.2V @ 25
oC
95
233
MHz
Input clock duty cycle
dtin
40
60
%
CLK stabilization
TSTAB
15
s
PARAMETER
SYMBOL
CONDITION
MIN
TYP
MAX
UNITS
Low-to high level
propagation delay time
tPLH
1
BUF_IN to any output
3.5
ns
High-to low level propagation
delay time
tPLL
1
BUF_IN to any output
3.5
ns
Period jitter
Tjit (per)
100MHz to 200MHz
-30
30
ps
Half-period jitter
t(jit_hper)
100MHz to 200MHz
-100
100
ps
Input clock slew rate
tsl(i)
14
V/ns
Output clock slew rate
tsl(o)
12
V/ns
Cycle to Cycle Jitter
1
Tcyc-Tcyc
100MHz to 200MHz
-50
50
ps
Static Phase Offset
t(static phase offset)
4
-50
0
50
ps
Output to Output Skew
Tskew
40
ps
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| 9P20S | ACTIVE DELAY LINE, TRUE OUTPUT, PDIP8 |
| 9P35S | ACTIVE DELAY LINE, TRUE OUTPUT, PDIP8 |
| 9P5S | ACTIVE DELAY LINE, TRUE OUTPUT, PDIP8 |
| 9P50S | ACTIVE DELAY LINE, TRUE OUTPUT, PDIP8 |
| 9P936AGLFT | LOW SKEW CLOCK DRIVER, PDSO28 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| 9P936AFLF | 功能描述:時鐘緩沖器 RoHS:否 制造商:Texas Instruments 輸出端數(shù)量:5 最大輸入頻率:40 MHz 傳播延遲（最大值）: 電源電壓-最大:3.45 V 電源電壓-最小:2.375 V 最大功率耗散: 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LLP-24 封裝:Reel |
| 9P936AFLFT | 功能描述:時鐘驅(qū)動器及分配 RoHS:否 制造商:Micrel 乘法/除法因子:1:4 輸出類型:Differential 最大輸出頻率:4.2 GHz 電源電壓-最大: 電源電壓-最小:5 V 最大工作溫度:+ 85 C 封裝 / 箱體:SOIC-8 封裝:Reel |
| 9P936AGLF | 功能描述:時鐘緩沖器 RoHS:否 制造商:Texas Instruments 輸出端數(shù)量:5 最大輸入頻率:40 MHz 傳播延遲（最大值）: 電源電壓-最大:3.45 V 電源電壓-最小:2.375 V 最大功率耗散: 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LLP-24 封裝:Reel |
| 9P936AGLFT | 功能描述:時鐘緩沖器 RoHS:否 制造商:Texas Instruments 輸出端數(shù)量:5 最大輸入頻率:40 MHz 傳播延遲（最大值）: 電源電壓-最大:3.45 V 電源電壓-最小:2.375 V 最大功率耗散: 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LLP-24 封裝:Reel |
| 9P939AFLF | 制造商:Integrated Device Technology Inc 功能描述:IDT 9P939AFLF GENERAL PURPOSE SEMICONDUCTORS - Rail/Tube 制造商:Integrated Device Technology Inc 功能描述:IDT 9P939AFLF General Purpose Semiconductors |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。