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參數(shù)資料
| 型號： | 9LPRS511EGLF |
| 廠商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | SPECIALTY MICROPROCESSOR CIRCUIT, PDSO64 |
| 封裝： | 6.10 MM BODY, 0.50 MM PITCH, ROHS COMPLIANT, MO-153, TSSOP-64 |
| 文件頁數(shù)： | 13/19頁 |
| 文件大?。?/td> | 297K |
| 代理商： | 9LPRS511EGLF |
3
Integrated
Circuit
Systems, Inc.
ICS9LPRS511
Advance Information
1137—09/05/08
Pin Description (Continued)
Pin#
Pin Name
Type Pin Description
33
PCIeC_LR5
OUT
Complement clock of 0.75V differential push-pull PCI_Express pair with integrated
33ohm series resistor
34
PCIeT_LR5
OUT
True clock of 0.75V differential push-pull PCI_Express pair with integrated 33ohm
series resistor
35
PCIeC_LR6
OUT
Complement clock of 0.75V differential push-pull PCI_Express pair with integrated
33ohm series resistor
36
PCIeT_LR6
OUT
True clock of 0.75V differential push-pull PCI_Express pair with integrated 33ohm
series resistor
37
GND
PWR Ground pin.
38
PCIeC_LR7
OUT
33ohm series resistor
39
PCIeT_LR7
OUT
True clock of 0.75V differential push-pull PCI_Express pair with integrated 33ohm
series resistor
40
PCIeC_LR8
OUT
Complement clock of 0.75V differential push-pull PCI_Express pair with integrated
33ohm series resistor
41
PCIeT_LR8
OUT
True clock of 0.75V differential push-pull PCI_Express pair with integrated 33ohm
series resistor
42
VDDA
PWR 3.3V power for the PLL core.
43
GNDA
PWR Ground pin for the PLL core.
44
VDDI/O
PWR Power supply for differential outputs
45
CPUC_LR1
OUT
Complementary clock of differential pair 0.75V push-pull CPU outputs with integrated
33ohm series resistor.
46
CPUT_LR1
OUT
True clock of differential pair 0.75V push-pull CPU outputs with integrated 33ohm
series resistor.
47
VDDCPU
PWR Supply for CPU clocks, 3.3V nominal
48
CPUC_LR0
OUT
Complementary clock of differential pair 0.75V push-pull CPU outputs with integrated
33ohm series resistor.
49
CPUT_LR0
OUT
True clock of differential pair 0.75V push-pull CPU outputs with integrated 33ohm
series resistor.
50
GND
PWR Ground pin.
51
SCLK
IN
Clock pin of SMBus circuitry, 5V tolerant.
52
SDATA
I/O
Data pin for SMBus circuitry, 5V tolerant.
53
VDDREF
PWR Ref, XTAL power supply, nominal 3.3V
54
X2
OUT
Crystal output, Nominally 14.318MHz
55
X1
IN
Crystal input, Nominally 14.318MHz.
56
GND
PWR Ground pin.
57
REF0_2x/FSLC
I/O
2x strength 14.318 MHz reference clock./ 3.3V tolerant input for CPU frequency
selection. Refer to input electrical characteristics for Vil_FS and Vih_FS values.
58
GND
PWR Ground pin.
59
SATACLKC_LR
OUT
Complement clock of 0.75V push-pull differential SATA pair with integrated 33ohm
series resistor.
60
SATACLKT_LR
OUT
True clock of 0.75V push-pull differential SATA pair with integrated 33ohm series
resistor.
61
VDDSATA
PWR Supply for SATA clocks, 3.3V nominal
62
VDD25Mhz
PWR Power supply for 25MHz clocks, 3.3V nominal.
63
GND
PWR Ground pin.
64
25Mhz_0F_2x/Freerun*
I/O
2x strength 25MHz clock output, 3.3V (free running by default) / Latch input to select if
25Mhz_0 is freerunning or stoppable on power up default. Freerun = 1, 25Mhz_0 is
free running, Freerun = 0, 25Mhz_0 is stoppable.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| 9LPRS511EGLFT | 功能描述:時鐘合成器/抖動清除器 RoHS:否 制造商:Skyworks Solutions, Inc. 輸出端數(shù)量: 輸出電平: 最大輸出頻率: 輸入電平: 最大輸入頻率:6.1 GHz 電源電壓-最大:3.3 V 電源電壓-最小:2.7 V 封裝 / 箱體:TSSOP-28 封裝:Reel |
| 9LPRS525 | 制造商:IDT 制造商全稱:Integrated Device Technology 功能描述:56-pin CK505 for Intel Systems |
| 9LPRS525AFLF | 功能描述:時鐘合成器/抖動清除器 56-PIN CK505 COMPATIBLE RoHS:否 制造商:Skyworks Solutions, Inc. 輸出端數(shù)量: 輸出電平: 最大輸出頻率: 輸入電平: 最大輸入頻率:6.1 GHz 電源電壓-最大:3.3 V 電源電壓-最小:2.7 V 封裝 / 箱體:TSSOP-28 封裝:Reel |
| 9LPRS525AFLFT | 功能描述:時鐘合成器/抖動清除器 56-PIN CK505 COMPATIBLE RoHS:否 制造商:Skyworks Solutions, Inc. 輸出端數(shù)量: 輸出電平: 最大輸出頻率: 輸入電平: 最大輸入頻率:6.1 GHz 電源電壓-最大:3.3 V 電源電壓-最小:2.7 V 封裝 / 箱體:TSSOP-28 封裝:Reel |
| 9LPRS525AGILF | 功能描述:時鐘合成器/抖動清除器 56-PIN CK505 COMPATIBLE RoHS:否 制造商:Skyworks Solutions, Inc. 輸出端數(shù)量: 輸出電平: 最大輸出頻率: 輸入電平: 最大輸入頻率:6.1 GHz 電源電壓-最大:3.3 V 電源電壓-最小:2.7 V 封裝 / 箱體:TSSOP-28 封裝:Reel |
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