參數(shù)資料
型號： 9LPRS365BKLF
廠商： INTEGRATED DEVICE TECHNOLOGY INC
元件分類： 微控制器/微處理器
英文描述： SPECIALTY MICROPROCESSOR CIRCUIT, PQCC64
封裝： PLASTIC, VQFN-64
文件頁數(shù)： 3/28頁
文件大?。?/td> 301K
代理商： 9LPRS365BKLF
11
ICS9LPRS365
Datasheet
1218—09/01/10
REF
CPU(1:0)
CPU PLL1
SS
OSC
REF
SRC(11-9,4:3, 7:6)
PLL2
Non-SS
PLL3
SS
7
SRC8/CPU_ITP
PCIF5 (4:0)
SRC2/SATA
27MHz/SRC1/SE(2:1)
SE Outputs
SATA
DOT96MHz
PCI33MHz
SRC
SR C _M A IN
PCI33MHz
Differential Output
SRC0/DOT96
48MHz
CPU
FSLA
CKPWRGD/PD#
PCI_STOP#
CPU_STOP#
CR#_(A:H)
27_Select
TME, ITP_EN
FSLC/TESTSEL
FSLB/TESTMODE
Control
Logic
X1
X2
27MHz_NonSS
ICS9LPRS365 follows Intel CK505 Yellow Cover specification. This clock synthesizer provides a single chip solution for next
generation P4 Intel processors and Intel chipsets. ICS9LPRS365 is driven with a 14.318MHz crystal. It also provides a tight
ppm accuracy output for Serial ATA and PCI-Express support.
General Description
Block Diagram
Power Groups
VDD
GND
49
52
CPUCLK
Low power outputs
55
52
26, 36, 45
23, 29, 42
Low power outputs
39
23, 29, 42
PLL 1
20
19
Low power outputs
16
19
PLL 3
12
11
DOT 96Mhz
Low power outputs
911
61
58
28
USB 48
Xtal, REF
PCICLK
SRCCLK
Pin Number
Description
PLL3/SE
Master Clock, Analog
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