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參數(shù)資料
| 型號(hào)： | 9FGP202AKLFT |
| 廠商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分類： | 時(shí)鐘產(chǎn)生/分配 |
| 英文描述： | 33.33 MHz, OTHER CLOCK GENERATOR, PQCC40 |
| 封裝： | ROHS COMPLIANT, PLASTIC, MLF-40 |
| 文件頁數(shù)： | 17/18頁 |
| 文件大?。?/td> | 137K |
| 代理商： | 9FGP202AKLFT |
8
Integrated
Circuit
Systems, Inc.
ICS9FGP202A
1339C—09/14/09
Electrical Characteristics - CPU 0.7V Current Mode Differential Pair
PARAMETER
SYMBOL
CONDITIONS*
MIN
TYP
MAX
UNITS
NOTES
Current Source Output
Impedance
Zo
VO = Vx
3000
Ω
1
Voltage High
VHigh
660
850
mV
1,3
Voltage Low
VLow
-150
150
mV
1,3
Max Voltage
Vovs
1150
mV
1
Min Voltage
Vuds
-300
mV
1
Crossing Voltage (abs)
Vx(abs)
250
550
mV
1
Crossing Voltage (var)
d-Vx
Variation of crossing over all
edges
140
mV
1
Long Accuracy
ppm
see Tperiod min-max values
-100
0
100
ppm
1,2
400MHz nominal
2.4998
2.5000
2.5003
ns
2
400MHz spread
2.4998
2.5128
ns
2
333.33MHz nominal
2.9997
3.0000
3.0003
ns
2
333.33MHz spread
2.9997
3.0154
ns
2
266.66MHz nominal
3.7496
3.7500
3.7504
ns
2
266.66MHz spread
3.7496
3.7692
ns
2
200MHz nominal
4.9995
5.0000
5.0005
ns
2
200MHz spread
4.9995
5.0256
ns
2
166.66MHz nominal
5.9994
6.0000
6.0006
ns
2
166.66MHz spread
5.9994
6.0307
ns
2
133.33MHz nominal
7.4993
7.5000
7.5008
ns
2
133.33MHz spread
7.4993
7.5385
ns
2
100.00MHz nominal
9.9990
10.0000
10.0010
ns
2
100.00MHz spread
9.9990
10.0513
ns
2
400MHz nominal/spread
2.4148
2.5978
ns
1,2
333.33MHz nominal/spread
2.9147
3.1004
ns
1,2
266.66MHz nominal/spread
3.6646
3.8542
ns
1,2
200MHz nominal/spread
4.9145
5.1106
ns
1,2
166.66MHz nominal/spread
5.9144
6.1157
ns
1,2
133.33MHz nominal/spread
7.4143
7.6235
ns
1,2
100.00MHz nominal/spread
9.9140
10.1363
ns
1,2
Rise Time
tr
VOL = 0.175V, VOH = 0.525V
175
700
ps
1
Fall Time
tf
VOH = 0.525V VOL = 0.175V
175
700
ps
1
Rise Time Variation
d-tr
VOL = 0.175V, VOH = 0.525V
125
ps
1
Fall Time Variation
d-tf
VOH = 0.525V VOL = 0.175V
125
ps
1
Duty Cycle
dt3
Measurement from differential
wavefrom
45
55
%
1
Jitter, Cycle to cycle
tjcyc-cyc
Measurement from differential
wavefrom, CPUCLK
85
ps
1
*TA = 0 - 70°C; VDD = 3.3 V +/-5%; CL =2pF, RS=33.2
Ω, RP=49.9Ω, ΙREF = 475Ω
1Guaranteed by design and characterization, not 100% tested in production.
2 All Long Term Accuracy and Clock Period specifications are guaranteed assuming that REFOUT is at 25.000MHz
3I
REF = VDD/(3xRR). For RR = 475
Ω (1%), IREF = 2.32mA. IOH = 6 x IREF and VOH = 0.7V @ ZO=50Ω.
Average period
Tperiod
Absolute min/max period
Tabsmin/max
Statistical measurement on single
ended signal
Measurement on single ended
signal using absolute value.
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