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參數(shù)資料
| 型號： | 9EX21831AKLFT |
| 廠商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分類： | 時鐘及定時 |
| 英文描述： | 21831 SERIES, PLL BASED CLOCK DRIVER, 18 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PQCC72 |
| 封裝： | ROHS COMPLIANT, PLASTIC, MLF-72 |
| 文件頁數(shù)： | 14/17頁 |
| 文件大?。?/td> | 179K |
| 代理商： | 9EX21831AKLFT |
IDT
Eighteen Output Differential Buffer w/2 input mux for PCIe Gen3
1678A—07/13/10
9EX21831
Eighteen Output Differential Buffer w/2 input mux for PCIe Gen3
6
Electrical Characteristics - Clock Input Parameters
TA = TCOM; Supply Voltage VDD = 3.3 V +/-5%
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS NOTES
Input High Voltage - DIF_IN
VIHDIF
Differential inputs
(single-ended measurement)
600
800
1150
mV
1
Input Low Voltage - DIF_IN
VILDIF
Differential inputs
(single-ended measurement)
VSS - 300
0
300
mV
1
Input Common Mode
Voltage - DIF_IN
VCOM
Common Mode Input Voltage
300
1000
mV
1
Input Amplitude - DIF_IN
VSWING
Peak to Peak value
300
1450
mV
1
Input Slew Rate - DIF_IN
dv/dt
Measured differentially
0.4
8
V/ns
1,2
Input Leakage Current
IIN
VIN = VDD , VIN = GND
-5
5
uA
1
Input Duty Cycle
dtin
Measurement from differential wavefrom
45
55
%
1
Input Jitter - Cycle to Cycle
JDIFIn
Differential Measurement
0
125
ps
1
1 Guaranteed by design and characterization, not 100% tested in production.
2Slew rate measured through +/-75mV window centered around differential zero
Electrical Characteristics - DIF 0.7V Current Mode Differential Outputs
TA = TCOM; Supply Voltage VDD = 3.3 V +/-5%
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS NOTES
Slew rate
Trf
Scope averaging on
1
4
V/ns
1, 2, 3
Slew rate matching
ΔTrf
Slew rate matching, Scope averaging on
20
%
1, 2, 4
Voltage High
VHigh
660
850
1
Voltage Low
VLow
-150
150
1
Max VoltageVmax
1150
1
Min Voltage
Vmin
-300
1
Vswing
Scope averaging off
300
mV
1, 2
Crossing Voltage (abs)
Vcross_abs
Scope averaging off
250
550
mV
1, 5
Crossing Voltage (var)
Δ-Vcross
Scope averaging off
140
mV
1, 6
2 Measured from differential waveform
6 The total variation of all Vcross measurements in any particular system. Note that this is a subset of V_cross_min/max (V_cross absolute)
allowed. The intent is to limit Vcross induced modulation by setting V_cross_delta to be smaller than V_cross absolute.
mV
Statistical measurement on single-ended signal
using oscilloscope math function. (Scope averaging
on)
Measurement on single ended signal using absolute
value. (Scope averaging off)
mV
1Guaranteed by design and characterization, not 100% tested in production. IREF = VDD/(3xR
R). For RR = 475 (1%), IREF = 2.32mA. IOH =
6 x IREF and VOH = 0.7V @ ZO=50 (100
Ω differential impedance).
3 Slew rate is measured through the Vswing voltage range centered around differential 0V. This results in a +/-150mV window around
differential 0V.
4 Matching applies to rising edge rate of Clock / falling edge rate of Clock#. It is measured in a +/-75mV window centered on the average
cross point where Clock rising meets Clock# falling. The median cross point is used to calculate the voltage thresholds the oscilloscope uses
for the edge rate calculations.
5 Vcross is defined as voltage where Clock = Clock# measured on a component test board and only applies to the differential rising edge (i.e.
Clock rising and Clock# falling).
Electrical Characteristics - Current Consumption
TA = 0 - 70°C; Supply Voltage VDD/VDDA = 3.3 V +/-5%,
PARAMETER
SYMBOL
CONDITIONS
MIN TYP MAX UNITS
NOTES
IDD3.3OP
VDD rail. All outputs active @100MHz, CL =
Full load;
340
425
mA
1
IDD3.3AOP
VDDA rail. All outputs active @100MHz, CL =
Full load;
30
40
mA
1
IDD3.3PDZ
VDD Rail, All differential pairs tri-stated
12
15
mA
1
IDD3.3APDZ
VDDA Rail, All differential pairs tri-stated
13
20
mA
1
1Guaranteed by design and characterization, not 100% tested in production.
Operating Supply Current
Powerdown Current
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